Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipMemory Controller3.2.6 SDRAM ClockingThe MCU provides 4 clocks (DCLKOUT[3:0]) to the SDRAM memory subsystem at 100 MHz.The 72-bit 2-bank SDRAM DIMM specification requires 4 clocks to distribute the loading acrosseighteen x8 SDRAM components.DCLKOUT is driven back into the Intel ® 80312 I/O companion chip as DCLKIN so thatDCLK[3:0] may be skewed back to accommodate for the clocks’ flight time and be compatiblewith 133 MHz SDRAM technologies. The amount of skew is determined by the board trace length.Refer to Figure 3-19 for the layout diagram. SDRAM layout details as well as the clocking strategyare recommended in the Intel ® 80312 I/O companion chip Design Guide.Figure 3-19.SDRAM ClockingDQ[71:0]SDQ[71:0]SDQ[71:0]DQ[71:0]DCLKINDCLKOUTI_CLKDCLKOUT[3:0]CLK[3:0]CLK[3:0]SDRAMDIMM0SDRAMDIMM1(used forMAX timings)MCU3-34 Developer’s Manual