Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipPCI-to-PCI Bridge Unit4.15.24 Secondary IDSEL Select Register - SISRThe Secondary IDSEL Select Register controls the usage of S_AD[25:16] in Type 1 to Type 0conversions from the Primary to Secondary interface. In default operation, a unique encoding onPrimary addresses P_AD[15:11] results in the assertion of one bit on the Secondary address busS_AD[31:16] during a Type 1 to Type 0 conversion (See Section 4.4.2.).Thisisusedfortheassertion of IDSEL on the device being targeted by the Type 0 configuration command. Thisregister allows Secondary address bits S_AD[25:16] to be used to configure private PCI devices byforcing Secondary address bits S_AD[25:16] to all zeros during Type 1 to Type 0 conversions,regardless of the state of Primary addresses P_AD[15:11] (device number in Type 1 configurationcommand).When any address bit within S_AD[25:16] is to be used for private Secondary PCI devices, theIntel ® 80200 processor must guarantee that the corresponding bit in the SISR register is set beforethe host tries to configure the hierarchical PCI buses.Table 4-47. Secondary IDSEL Select Register - SISR (Sheet 1 of 2)IOPAttributes15 12 8 4 0rv rv rv rv rv rv rw rw rw rw rw rw rw rw rw rwPCIAttributesrvrvrvrvrvrvrw rw rw rw rw rwrw rwrw rwPCI Configuration Offset42 - 43HIntel ® 80200 Processor Local Bus Address0000 1042HAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description15:10 000000 2 Reserved.09 0 2AD16 - IDSEL Disable - When this bit is set, AD16 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD16 will be asserted when Primary addresses AD[15:11] = 00000 2 during aType 1 to Type 0 conversion.08 0 2AD17 - IDSEL Disable - When this bit is set, AD17 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD17 will be asserted when Primary addresses AD[15:11] = 00001 2 during aType 1 to Type 0 conversion.07 0 2AD18 - IDSEL Disable - When this bit is set, AD18 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD18 will be asserted when Primary addresses AD[15:11] = 00010 2 during aType 1 to Type 0 conversion.06 0 2AD19 - IDSEL Disable - When this bit is set, AD19 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD19 will be asserted when Primary addresses AD[15:11] =00011 2 during aType 1 to Type 0 conversion.05 0 2AD20 - IDSEL Disable - When this bit is set, AD20 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD20 will be asserted when Primary addresses AD[15:11] = 00100 2 during aType 1 to Type 0 conversion.04 0 2AD21 - IDSEL Disable - When this bit is set, AD21 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD21 will be asserted when Primary addresses AD[15:11] = 00101 2 during aType 1 to Type 0 conversion.03 0 2AD22 - IDSEL Disable - When this bit is set, AD22 will be deasserted for any possible Type 1 to Type 0conversion. When clear, AD22 will be asserted when Primary addresses AD[15:11] =00110 2 during aType 1 to Type 0 conversion.Developer’s Manual 4-111