Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipMemory Controller3.1.1 GlossaryThis section lists commonly used terms throughout this chapter:Table 3-1.Commonly Used TermsTermBankColumnDIMMLeafPageRowScrubbingSyndromeDefinitionA bank is defined as a memory region defined with a base register and a bank size register.Physically, a bank of memory is controlled by a single chip select. A DIMM could comprise of asingle or dual banks.A column refers to a portion of memory within an SDRAM device. An SDRAM device can bethought of as a grid with rows and columns. Once a row is activated, any column within thatrow can be accessed multiple times without reactivating the row. Columns are activated withSCAS#.A DIMM is an acronym for Dual Inline Memory Module. A DIMM is a physical card comprisingmultiple SDRAM devices. The card could be populated on one or both sides. A DIMM can besingle or dual-bank.SDRAM devices use multiple banks within the device operating in an interleaved mode.16 Mbit SDRAM devices contains two internal banks and the MCU supports 64 Mbit devicescontaining four internal banks. An internal bank is defined as a leaf (to avoid confusion with amemory bank).A page is a row of memory. Once a row is activated, any column within that row can beaccessed multiple times without reactivating the row. This is referred to as “keeping the pageopen.” While it depends on the SDRAM device configuration, the MCU supports only thesmallest possible page size (2 Kbytes for 64-bit wide memory). Therefore, When an SDRAMphysical configuration supports a larger page size, the MCU breaks it up into smaller 2 Kbytepages.A row refers to a portion of memory within an SDRAM device. An SDRAM device can bethought of as a grid with rows and columns. Once a row is activated, any column within thatrow can be accessed multiple times without reactivating the row. Rows are activated withSRAS#.Once an error is detected within the memory array, the MCU must correct the error (whenpossible) while delivering the data to the initiator. Correcting the memory location is referred toas “scrubbing the array.” The MCU relies on software to scrub any errors.A syndrome is a value which indicates an error in the data read from the memory array. TheMCU computes the syndrome with every memory read. Decoding the syndrome indicates: thebit in error for a single-bit error, a double-bit error, or a nibble-error. Table 3-13 defines thesyndrome decoding.3-2 Developer’s Manual