Intel 80312 I/O Companion Chip - ECEE

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Intel ® 80312 I/O Companion ChipTest FeaturesTable 14-4. Intel ® 80312 I/O Companion Chip Boundary Scan Register Bit Order (Sheet 5 of 13)# Cell Type NameFunctionSafe bit Control Signal Disable Value Disable Result"147 (BC_1, sa(6), output3, X, 205, 1, Z)," &"148 (BC_1, sa(8), output3, X, 205, 1, Z)," &"149 (BC_1, sa(7), output3, X, 205, 1, Z)," &"150 (BC_1, sa(9), output3, X, 205, 1, Z)," &"151 (BC_1, sba(0), output3, X, 205, 1, Z)," &"152 (BC_1, sa(11), output3, X, 205, 1, Z)," &"153 (BC_1, sa(10), output3, X, 205, 1, Z)," &"154 (BC_1, sba(1), output3, X, 205, 1, Z)," &"155 (BC_4, dclkin, input, X)," &"156 (BC_1, sa(12), output3, X, 205, 1, Z)," &"157 (BC_1, sdqm(2), output3, X, 205, 1, Z)," &"158 (BC_1, sdqm(3), output3, X, 205, 1, Z)," &"159 (BC_1, scke(0), output3, X, 205, 1, Z)," &"160 (BC_1, sdqm(6), output3, X, 205, 1, Z)," &"161 (CBSC_1, scb(2), bidir, X, 200, 0, Z)," &"162 (CBSC_1, scb(3), bidir, X, 200, 0, Z)," &"163 (BC_1, sdqm(7), output3, X, 205, 1, Z)," &"164 (BC_1, sa(13), output3, X, 205, 1, Z)," &"165 (CBSC_1, scb(6), bidir, X, 200, 0, Z)," &"166 (CBSC_1, dq(16), bidir, X, 201, 0, Z)," &"167 (CBSC_1, dq(17), bidir, X, 201, 0, Z)," &"168 (CBSC_1, scb(7), bidir, X, 200, 0, Z)," &"169 (CBSC_1, dq(48), bidir, X, 204, 0, Z)," &"170 (CBSC_1, dq(18), bidir, X, 201, 0, Z)," &"171 (CBSC_1, dq(49), bidir, X, 204, 0, Z)," &"172 (CBSC_1, dq(19), bidir, X, 201, 0, Z)," &"173 (CBSC_1, dq(50), bidir, X, 204, 0, Z)," &"174 (CBSC_1, dq(20), bidir, X, 201, 0, Z)," &"175 (CBSC_1, dq(51), bidir, X, 204, 0, Z)," &"176 (CBSC_1, dq(21), bidir, X, 201, 0, Z)," &"177 (BC_1, scke(1), output3, X, 205, 1, Z)," &"178 (CBSC_1, dq(22), bidir, X, 201, 0, Z)," &"179 (CBSC_1, dq(52), bidir, X, 204, 0, Z)," &"180 (CBSC_1, dq(23), bidir, X, 201, 0, Z)," &"181 (CBSC_1, dq(53), bidir, X, 204, 0, Z)," &"182 (CBSC_1, dq(24), bidir, X, 201, 0, Z)," &"183 (CBSC_1, dq(54), bidir, X, 204, 0, Z)," &14-10 Developer’s Manual
Intel ® 80312 I/O Companion ChipTest FeaturesTable 14-4. Intel ® 80312 I/O Companion Chip Boundary Scan Register Bit Order (Sheet 6 of 13)# Cell Type NameFunctionSafe bit Control Signal Disable Value Disable Result"184 (CBSC_1, dq(55), bidir, X, 204, 0, Z)," &"185 (CBSC_1, dq(25), bidir, X, 201, 0, Z)," &"186 (CBSC_1, dq(26), bidir, X, 201, 0, Z)," &"187 (CBSC_1, dq(56), bidir, X, 204, 0, Z)," &"188 (CBSC_1, dq(27), bidir, X, 201, 0, Z)," &"189 (CBSC_1, dq(57), bidir, X, 204, 0, Z)," &"190 (CBSC_1, dq(28), bidir, X, 201, 0, Z)," &"191 (CBSC_1, dq(59), bidir, X, 204, 0, Z)," &"192 (CBSC_1, dq(58), bidir, X, 204, 0, Z)," &"193 (CBSC_1, dq(30), bidir, X, 201, 0, Z)," &"194 (CBSC_1, dq(29), bidir, X, 201, 0, Z)," &"195 (CBSC_1, dq(60), bidir, X, 204, 0, Z)," &"196 (CBSC_1, dq(61), bidir, X, 204, 0, Z)," &"197 (CBSC_1, dq(31), bidir, X, 201, 0, Z)," &"198 (CBSC_1, dq(62), bidir, X, 204, 0, Z)," &"199 (CBSC_1, dq(63), bidir, X, 204, 0, Z)," &"200 (BC_1, *, control, 0)," &"201 (BC_1, *, control, 0)," &"202 (BC_1, *, control, 0)," &"203 (BC_1, *, control, 0)," &"204 (BC_1, *, control, 0)," &"205 (BC_1, *, control, 1)," &"206 (CBSC_1, s_ad(38), bidir, X, 325, 0, Z)," &"207 (CBSC_1, s_ad(34), bidir, X, 325, 0, Z)," &"208 (CBSC_1, s_ad(42), bidir, X, 325, 0, Z)," &"209 (CBSC_1, s_ad(36), bidir, X, 325, 0, Z)," &"210 (CBSC_1, s_ad(33), bidir, X, 325, 0, Z)," &"211 (CBSC_1, s_ad(32), bidir, X, 325, 0, Z)," &"212 (CBSC_1, s_ad(40), bidir, X, 325, 0, Z)," &"213 (CBSC_1, s_ad(37), bidir, X, 325, 0, Z)," &"214 (CBSC_1, s_ad(46), bidir, X, 324, 0, Z)," &"215 (CBSC_1, s_ad(35), bidir, X, 324, 0, Z)," &"216 (CBSC_1, s_ad(44), bidir, X, 324, 0, Z)," &"217 (CBSC_1, s_ad(39), bidir, X, 324, 0, Z)," &"218 (CBSC_1, s_ad(41), bidir, X, 324, 0, Z)," &"219 (CBSC_1, s_ad(50), bidir, X, 324, 0, Z)," &"220 (CBSC_1, s_ad(48), bidir, X, 324, 0, Z)," &Developer’s Manual 14-11
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