Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipI 2 C Bus Interface Unit12.3.4.2 SDA ArbitrationArbitration on the SDA line can continue for a long period, starting with address and R/W# bits andcontinuing with data bits. Figure 12-8 shows the arbitration procedure for two masters (more thantwo may be involved depending on how many masters are connected to the bus). When the addressand R/W# are the same, arbitration moves to the data. Due to the wired-AND nature of the I 2 C bus,no data is lost when both (or all) masters are outputting the same bus states. When address, R/W#,or data is different, the master that output the first low data bit loses arbitration and shuts its datadrivers off. When the I 2 C unit loses arbitration, it shuts off the SDA or SCL drivers for remainderof byte transfer, sets arbitration loss detected ISR bit, then returns to idle (Slave-Receive) mode.Figure 12-8.Arbitration Procedure of Two MastersTransmitter 1 Leaves Arbitration Data 1 SDAData 1ata 2SDASCLWhen the I 2 C unit loses arbitration during transmission of the seven address bits and the Intel ®80312 I/O companion chip is not being addressed as a slave device, the I 2 C unit re-sends theaddress when the I 2 C bus becomes free. This is possible because the IDBR and ICR registers arenot overwritten when arbitration is lost.When the arbitration loss is to due to another bus master addressing the Intel ® 80312 I/Ocompanion chip as a slave device, the I 2 C unit switches to slave-receive mode and the original datain the I 2 C data buffer register is overwritten. Software is responsible for clearing the start andre-initiating the master transaction at a later time.Note:Software must not allow the I 2 C unit to write to its own slave address. This can cause the I 2 Cbustoenter an indeterminate state.Boundary conditions exist for arbitration when an arbitration process is in progress and a repeatedSTART or STOP condition is transmitted on the I 2 C bus. To prevent errors, the I 2 C unit, acting as amaster, provides for the following sequences:• No arbitration takes place between a repeated START condition and a data bit• No arbitration takes place between a data bit and a STOP condition• No arbitration takes place between a repeated START condition and a STOP conditionThese situations arise only when different masters write the same data to the same target slavesimultaneously and arbitration is not resolved after the first data byte transfer.Note:Typically, software is responsible for ensuring arbitration is lost soon after the transaction begins.For example, the protocol might insist that all masters transmit their I 2 Caddressasthefirstdatabyte of any transaction ensuring arbitration is ended. A restart is then sent to begin a valid datatransfer (the slave can then discard the master’s address).Developer’s Manual 12-13