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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong>I 2 C Bus Interface Unit12.5.5 Read 2 Bytes as a Master - Send STOP Using the Abort1. Write IDBR: Target slave address and R/W# bit (1 for read)2. Write ICR: Set START bit, Clear STOP bit, Disable Arb loss interrupt, Set Transfer Byte bit toinitiate the access3. Wait for IDBR Transmit Empty interrupt. When interrupt comes.Read status register: IDBR Transmit Empty (set), Unit Busy (set), R/W# bit (set)Clear IDBR Transmit Empty bit to clear the interrupt.4. Read byte 1Write ICR: Clear START bit, Clear STOP bit, Enable Arb Loss interrupt, Clear Ack/Nack bit(Ack), Set Transfer Byte bit to initiate the access5. Wait for Buffer full interrupt.Read status register: IDBR Receive Full (set), Unit busy (set), R/W# bit (Set), Ack/Nack bit(Clear)Clear IDBR Receive Full bit to clear the interrupt.Read IDBR data.6. Read byte 2 with Nack (STOP is not set because STOP or Repeated START is decided on thebyte read)Write ICR: Clear START bit, Clear STOP bit, Enable Arb Loss interrupt, Set Ack/Nack bit(Nack), Set Transfer Byte bit to initiate the access7. Wait for Buffer full interrupt.Read status register: IDBR Receive Full (set), Unit Busy (set), R/W# bit (Set), Ack/Nack bit(Set)Clear IDBR Receive Full bit to clear the interrupt.Read IDBR data.There are now two options based on the byte read:• Send a repeated START• Send a STOP onlyHere, a STOP abort is sent.Note:Had a NACK not been sent, the next transaction must involve another data byte read.8. Send STOP abort condition. (STOP with no data transfer.)Write ICR: Set Master abort.Developer’s Manual 12-25

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