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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® 80200 Processor based on <strong>Intel</strong> ®XScale Microarchitecture CoreInterface Unit 8This chapter describes the <strong>Intel</strong> ® 80200 processor based on XScale microarchitecture (ARMarchitecture compliant) Core Interface Unit (CIU).8.1 OverviewThe Core Interface Unit (CIU) is a bridge between the <strong>Intel</strong> ® 80200 processor and the <strong>Intel</strong> ® <strong>80312</strong>I/O companion chip. The <strong>Intel</strong> ® <strong>80312</strong> I/O companion chip makes all of the chip’s resourcesavailable for control by the <strong>Intel</strong> ® 80200 processor via the CIU. The <strong>Intel</strong> ® 80200 processorcommunicates with the <strong>Intel</strong> ® <strong>80312</strong> I/O companion chip using the <strong>Intel</strong> ® 80200 processorRequest Bus which is comprised of two elements:1. A synchronous command bus provides the CIU with a read or write command, a transferlength and a start address.2. The <strong>Intel</strong> ® <strong>80312</strong> I/O companion chip SDRAM 64-bit data bus (DQ) transfers data associatedwith the <strong>Intel</strong> ® 80200 processor request bus commands. The data bus is shared by the <strong>Intel</strong> ®80200 processor request bus and the <strong>Intel</strong> ® <strong>80312</strong> I/O companion chip internal SDRAMmemory control unit (MCU).The CIU accepts <strong>Intel</strong> ® 80200 processor request bus accesses. It forwards read accesses to the IBand returns the read data. It completes write accesses for the <strong>Intel</strong> ® 80200 processor. DuringSDRAM reads <strong>Intel</strong> ® 80200 processor receives data directly from the SDRAM. For other readaccesses (Flash reads and PCI reads) CIU provides data received on the IB. Data for writesgenerated by the <strong>Intel</strong> ® 80200 processor is forwarded to IB by the CIU.All accesses received by the CIU from the <strong>Intel</strong> ® 80200 processor are processed in order.TheCIUistheonlyagentonthe<strong>Intel</strong> ® 80200 processor request bus. See Figure 8-1.Figure 8-1.<strong>Intel</strong> ® 80200 Processor Bus Controller Unit Block Diagram<strong>Intel</strong>® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong>SDRAMMemory Controller<strong>Intel</strong>® 80200 Processor Data Bus<strong>Intel</strong>® 80200 Processor Request Bus80200 Processor Core Interface UnitInternal Bus (IB)The CIU forwards <strong>Intel</strong> ® 80200 processor request bus accesses to the internal bus and isresponsible for their completion. No address translation is performed by the CIU.Developer’s Manual 8-1

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