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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong>DMA Controller UnitA series of chain descriptors can be built in local memory to transfer data between the PCI busesand the internal bus. For example, the application can build multiple chain descriptors to transfermany blocks of data which have different source addresses within the local memory. Whenmultiple chain descriptors are built in the <strong>Intel</strong> ® 80200 processor memory, the application can linkeach of these chain descriptors using the Next Descriptor Address in the chain descriptor. Thisaddress logically links the chain descriptors together. This allows the application to build a list ofDMA transfers which may not require the <strong>Intel</strong> ® 80200 processor until all of the DMA transfersare complete. Figure 9-4 shows a list of DMA transfers built in external memory and how they arelinked together.Figure 9-4.DMA Chaining OperationDescriptor Address RegisterDMA Controller RegisterLinked Descriptors In Local MemoryNext Descriptor Address (NDA)PCI Address [31:0] (PAD)PCI Upper Address [63:32] (PUAD)<strong>Intel</strong> ® 80200 Processor Local AddressBuffer TransfersFirstBufferTransferByte Count (BC)Descriptor Control (DC)Next Descriptor Address (NDA)PCI Address [31:0] (PAD)PCI Upper Address [63:32] (PUAD)<strong>Intel</strong> ® 80200 Processor Local AddressSecondBufferTransferByte Count (BC)Descriptor Control (DC).Next Descriptor Address (NDA)PCI Address [31:0] (PAD)PCI Upper Address [63:32] (PUAD)<strong>Intel</strong> ® 80200 Processor Local AddressEnd of Chain(Null Value Detected)NthBufferTransferByte Count (BC)Descriptor Control (DC)Developer’s Manual 9-7

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