Intel 80312 I/O Companion Chip - ECEE

.Intel ® 80312 I/O Companion ChipPCI-to-PCI Bridge Unit4.6 Bridge OperationTable 4-9.The Intel ® 80312 I/O companion chip bridge unit is capable of forwarding all types of memory, I/Oand configuration commands from one PCI interface to the other PCI interface. Table 4-9 definesthe PCI commands supported and not supported by the PCI-to-PCI bridge unit and its two PCIinterfaces. PCI commands are encoded within the C/BE[3:0]# pins on either interface during theaddress phase of any PCI transaction (excluding DAC cycles which encode the DAC command inthe first address phase and the read or write command in the second address phase).PCI CommandsC/BE#4.6.1 PCI InterfacesThe Intel ® 80312 I/O companion chip bridge unit consists of a Primary PCI interface and aSecondary PCI interface. When transactions are initiated on the Primary bus and claimed by thebridge, the Primary interface serves as a PCI target device and the Secondary interface serves as aninitiating device for the true PCI target on the Secondary bus. The Primary bus is the initiating busand the Secondary bus is the target bus. The sequence is reversed for transactions initiated on theSecondary bus. The interfaces are defined in the following sections.4.6.1.1 Primary InterfaceThe Primary PCI interface of the bridge unit is the interface connected to the lower numbered PCI bus,between the two PCI buses the Intel ® 80312 I/O companion chip bridges. The Primary PCI interfacemust adhere to the definition of a PCI master and slave device as defined within the PCI Local BusSpecification, Revision 2.2 and the PCI-to-PCI Bridge Architecture Specification,Revision1.1.4.6.1.2 Secondary InterfacePCI CommandInitiator: Primary BusTarget: Secondary BusInitiator: Secondary BusTarget: Primary Bus0000 2 Interrupt Acknowledge Ignore Ignore0001 2 Special Cycle Ignore Ignore0010 2 I/O Read Forward Forward0011 2 I/O Write Forward Forward0100 2 Reserved Ignore Ignore0101 2 Reserved Ignore Ignore0110 2 Memory Read Forward Forward0111 2 Memory Write Forward Forward1000 2 Reserved Ignore Ignore1001 2 Reserved Ignore Ignore1010 2 Configuration Read Forward Ignore1011 2 Configuration Write Forward Forward (Type 1 Only)1100 2 Memory Read Multiple Forward Forward1101 2 Dual Address Cycle Ignore Forward1110 2 Memory Read Line Forward Forward1111 2 Memory Write and Invalidate Forward ForwardThe Secondary PCI interface of the bridge unit will be the interface connected to the highernumbered PCI bus between the two PCI buses that the Intel ® 80312 I/O companion chip bridges.TheSecondaryPCIinterfacemustadheretothedefinitionofaPCImasterandslavedeviceasdefined within the PCI-to-PCI Bridge Architecture Specification, Revision 1.1 and the PCI LocalBus Specification, Revision 2.2.4-28 Developer’s Manual