Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipMessaging Unit6.8.18 Outbound Post Tail Pointer Register - OPTPRThe Outbound Post Tail Pointer Register (OPTPR) contains the local memory offset from theQueue Base Address of the tail pointer for the Outbound Post Queue. The Tail Pointer must bealigned on a word address boundary. When read, the Queue Base Address is provided in the upper12 bits of the register. Writes to the upper 12 bits of the register are ignored.Table 6-24.Outbound Post Tail Pointer Register - OPTPR3128 24 20 16 12 8 4 0IOPAttributesrororororororororororororw rw rw rwrw rw rw rw rw rw rw rwrw rw rw rw rw rwrvrvPCIAttributesrororororororororororororw rw rw rwrw rw rw rw rw rw rw rwrw rw rw rw rw rwrvrvOPTPRIntel ® 80200 Processor Local Bus Address137CHAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description31:20 000H Queue Base Address - Local memory address of the circular queues.Outbound Post Tail Pointer - Local memory offset of the tail pointer for the Outbound19:02 0000H 00 2 Post Queue.01:00 00 2 ReservedDeveloper’s Manual 6-35