Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipMemory Controller3.6.3 SDRAM Base Register - SDBRThis register indicates the beginning of SDRAM space. See Section 3.2.3.1, “SDRAM Sizes andConfigurations” on page 3-13 for usage details. There can be two contiguous physical banksdefined by SBR0 and SBR1 in the SDRAM subsystem starting at this address.Note:Table 3-20.SDRAM space must never cross a 512Mbyte boundary.SDRAM Base Register - SDBRIOPAttributes31 28 24 20 16 12 8 4 0rw rw rw rw rw rw rw rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rvPCIAttributesnanananananananananananananananananananananananananananananananaIntel ® 80200 Processor Local Bus Address1508HAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description31:25 0 SDRAM Base Address: These bits define the upper seven bits of the SDRAM base address.24:00 0 Reserved3-48 Developer’s Manual