Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipPCI Address Translation Unit5.7.17 ATU Interrupt Pin Register - ATUIPRATU Interrupt Pin Register bit definitions adhere to PCI Local Bus Specification, Revision 2.2.This register identifies the interrupt pin the ATU and Messaging Unit interface uses. The Intel ®80312 I/O companion chip is, by default, a PCI multi-function device and, as such, can generatemore than one interrupt output. The interrupt output is for the Messaging Unit on P_INTA#,P_INTB#, P_INTC#,orP_INTD#.TheIntel ® 80200 processor modifies the pin register to matchthe PCI interrupts which the Messaging Unit generates.Table 5-45.ATU Interrupt Pin Register - ATUIPRIOPAttributes7 4 0rw rw rw rw rw rw rw rwPCIAttributesrorororororororoIntel ® 80200 Processor Local Bus Address123DHPCI Configuration Address Offset3DHAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description07:00 01H Interrupt Used - A value of 01H signifies that the ATU interface unit uses INTA# as the interrupt pin.5-78 Developer’s Manual