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Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

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<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong><strong>Intel</strong> ® 80200 Processor based on <strong>Intel</strong> ® XScale Microarchitecture Core Interface Unit8.7.2 PCI Target-AbortThe CIU can receive a Target-Abort from the Internal Bus:• PCI Target-Abort: The ATU, as a PCI master on behalf of the CIU, received a Target-Abort onthe PCI bus and is returning the Target-Abort to the CIUThe PCI Target Abort is recorded in the PATUISR or SATUISR depending on which outboundATU window is accesses. The ATU generates an IRQ interrupt to the <strong>Intel</strong> ® 80200 processor. TheATU detects a Target-Abort on the PCI bus for a read access and the ATU returns the Target-Abortto the CIU during the read completion.8.8 Reset ConditionsThe CIU is reset:• when I_RST# is asserted• when the <strong>Intel</strong> ® 80200 processor is reset.When reset, the Write Data Buffer, Read Data Buffer, and Request Buffer are marked as invalid.Developer’s Manual 8-13

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