Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipPCI and Peripheral Interrupt Controller Unit2.2 Theory of OperationThe PCI and Peripheral Interrupt Controller (PPIC) provides the ability to generate interrupts toboth the Intel ® 80200 processor based on Intel ® XScale microarchitecture (ARM architecturecompliant) and the PCI bus. The Intel ® 80312 I/O companion chip contains a number ofperipherals which may generate an interrupt to the Intel ® 80200 processor. These are:• DMA Channel 0• DMA Channel 1• DMA Channel 2• Bridge Primary Interface• Bridge Secondary Interface• Performance Monitoring Unit• Primary ATU• Secondary ATU• I 2 C Bus Interface Unit• Application Accelerator Unit• Messaging Unit• Memory Controller UnitIn addition to the internal peripherals, external devices may also generate interrupts to the Intel ®80200 processor. The PCI and Peripheral Interrupt Controller provides the ability to direct PCIinterrupts. The routing logic provide, under software control, the ability to intercept the externalsecondary PCI interrupts and forward to the primary PCI interrupt pins.The PCI And Peripheral Interrupt Controller has two functions:• Internal Peripheral Interrupt Control• PCI Interrupt RoutingThe internal peripheral interrupt control mechanism consolidates a number of interrupt sources fora given peripheral into a single interrupt driven to the Intel ® 80200 processor. In order to providethe executing software with the knowledge of interrupt source, memory-mapped status registersdescribe the source of the interrupts. All of the peripheral interrupts are individually enabled fromthe respective peripheral control registers.The PCI interrupt routing mechanism allows the host software (or Intel ® 80200 processorsoftware) to route PCI interrupts to either the Intel ® 80200 processor or the P_INTA#, P_INTB#,P_INTC#, andP_INTD# output pins. This routing mechanism is controlled through amemory-mapped register accessible from the primary PCI bridge configuration space on the Intel ®80312 I/O companion chip.2.3 Intel ® 80312 I/O Companion Chip InterruptsThe Intel ® 80200 processor has two external interrupts, FIQ# and IRQ#. The interrupt controlleron the Intel ® 80312 I/O companion chip drives these two interrupt pins.IRQ# (Output) - This is the Intel ® 80200 processor normal interrupt. The Intel ® 80312 I/Ocompanion chip uses this interrupt to signal internal error conditions. IRQ has a lower priority thanFIQ.FIQ# (Output) - This is the Intel ® 80200 processor fast interrupt. The Intel ® 80312 I/Ocompanion chip uses this interrupt to signal internal and external interrupts.2-2 Developer’s Manual