Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipI 2 C Bus Interface Unit12.3.5 Master OperationsWhen software initiates a read or write on the I 2 Cbus,theI 2 C unit transitions from the defaultslave-receive mode to master-transmit mode. The start pulse is sent followed by the 7-bit slaveaddress and the R/W# bit. After the master receives an acknowledge, the I 2 C unit has the option oftwo master modes:• Master-Transmit — The Intel ® 80200 processor writes data• Master-Receive — The Intel ® 80200 processor reads dataThe Intel ® 80200 processor initiates a master transaction by writing to the ICR register. Data isread and written from the I 2 C unit through the memory-mapped registers.Table 12-5 describes the I 2 C Bus Interface Unit responsibilities as a master device.Table 12-5. Master Transactions (Sheet 1 of 3)I 2 CMasterActionGenerate clockoutputWrite targetslave address toIDBRWrite R/W# Bitto IDBRSignal STARTConditionInitiate first databyte transferMode ofOperationMaster-transmitMaster-receiveMaster-transmitMaster-receiveMaster-transmitMaster-receiveMaster-transmitMaster-receiveMaster-transmitMaster-receiveDefinition• The master always drives the SCL line.• The ICCR register is written.• The SCL Enable bit must be set.• The Unit Enable bit must be set.• The Intel ® 80200 processor (ARM architecture compliant) writes toIDBR bits 7-1 before a START condition is enabled.• First 7 bits sent on bus after START.• See Section 12.2.3.• The Intel ® 80200 processor writes to the least significant IDBR bitwith the target slave address.• When low, the master remains a master-transmitter. When high, themaster transitions to a master-receiver.• See Section 12.3.2.• See “Generate clock output” above.• Performed after target slave address and R/W# bit are in IDBR.• Intel ® 80200 processor sets the START bit.• Intel ® 80200 processor sets the Transfer Byte bit which initiates thestart condition.• See Section 12.2.3.• Intel ® 80200 processor writes byte to IDBR• I 2 C Bus Interface Unit transmits byte when Transfer Byte bit is set.• I 2 C Bus Interface Unit clears the Transfer Byte bit and sets the IDBRTransmit Empty bit when the transfer is complete.12-14 Developer’s Manual