Intel 80312 I/O Companion Chip - ECEE

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Intel ® 80312 I/O Companion ChipDMA Controller Unit9.14.4 Descriptor Address Register - DARThe Descriptor Address Register (DARx) contains the address of the current chain descriptor in theIntel ® 80200 processor local memory for a DMA transfer. This register read-only and is loadedwhen a new chain descriptor is read. Table 9-7 depicts the Descriptor Address Register.All chain descriptors are aligned on an eight 32-bit word boundaryTable 9-7.Descriptor Address Register - DARIOPAttributes31rororo28 24 20 16 12 8 4 0ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro roPCIAttributesnanananananananananananananananananananananananananananananananaChannel #012Intel ® 80200 Processor internal bus address140CH144CH148CHAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description00000000000Current Descriptor Address - local memory address of the current chain descriptor that was read by the31:05 00000000000channel.00000 204:00 00000 2 Reserved9-30 Developer’s Manual
Intel ® 80312 I/O Companion ChipDMA Controller Unit9.14.5 Byte Count Register - BCRThe Byte Count Register (BCRx) contains the number of bytes to transfer for a DMA transfer. Thisis a read-only register that is loaded from the Byte Count word in a chain descriptor. It allows for amaximum DMA transfer of 16 Mbytes. A value of zero is a valid byte count and results in no datawords being transferred and no cycles generated on either the PCI bus or the internal bus.Anytime this register is read by the Intel ® 80200 processor, it contains the number of bytes left totransfer on the internal bus. Note that valid data may be in the channel’s data queue. This register isdecremented by 1 through 8 bytes for every successful transfer from the source to destinationlocations. Table 9-8 shows the Byte Count RegisterNote:Table 9-8.The byte count value is not required to be aligned to a 32-bit word boundary.Byte Count Register - BCRIOPAttributes31rvrvrv28 24 20 16 12 8 4 0rv rv rv rv rv ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro roPCIAttributesnanananananananananananananananananananananananananananananananaChannel #012Intel ® 80200 Processor internal bus address1420H1460H14A0HAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description31:24 00H Reserved23:00 000000H Byte Count - is the number of bytes to transfer for a DMA transfer.Developer’s Manual 9-31
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