Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipClocking, Reset, and Initialization15.1.7 Clocking Region SummaryTable 15-2 summarizes all of the input clock pins, output clock pins, and clock strapping optionpins used in the Intel ® 80312 I/O companion chip.Table 15-2.Clock Pin SummaryPin Input/Output DescriptionP_CLK Input Primary PCI Input ClockS_CLK[5:0] Output Secondary PCI Output ClocksR_CLKOUT Output Reference Clock OutputR_CLKINInputReference Clock Input (Reference Clock Output Skewmatched to Secondary Output Clocks)P_M66EN Input Primary PCI 66 MHz EnableS_M66EN Input/Output Secondary PCI 66 MHz EnableDCLKIN Input SDRAM Input ClockDCLK[3:0] Output SDRAM Output ClocksDCLKOUT Output Early SDRAM Output ClockSCL Output I 2 C Output ClockTable 15-2 summarizes all of the clocks generated to the four regions within the Intel ® 80312 I/Ocompanion chip.Table 15-3.Intel ® 80312 I/O Companion Chip Clock Region SummaryInput Clock Region/Clock Buffered/PLL P_M66EN S_M66ENP_CLK =33MHzP_CLK =66MHzP_CLK =66MHzRegion 1: 1x P_CLKRegion 2: 3x P_CLKRegion 3: 3x P_CLKRegion 4: 1x P_CLKRegion 1: 1x P_CLKRegion 2: 3/2x P_CLKRegion 3: 3/2x P_CLKRegion 4: 1x P_CLKRegion 1: 1x P_CLKRegion 2: 3/2x P_CLKRegion 3: 3/2x P_CLKRegion 4: 1/2x P_CLKBufferedPLLPLLBufferedBufferedPLLPLLBufferedBufferedPLLPLLBuffered0 01 11 0NOTE: Combination of P_M66EN=0 and S_M66EN=1 is not supported by the Intel ® 80312 I/O companionchip. When P_M66EN=0, the Intel ® 80312 I/O companion chip forces S_M66EN=0 ensuring that theunsupported condition never occurs.15-4 Developer’s Manual