13.07.2015 Views

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

Intel 80312 I/O Companion Chip - ECEE

SHOW MORE
SHOW LESS
  • No tags were found...

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

<strong>Intel</strong> ® <strong>80312</strong> I/O <strong>Companion</strong> <strong>Chip</strong>Memory Controller3.6.4 SDRAM Boundary Register 0 - SBR0This register indicates the upper boundary of SDRAM bank 0. See Section 3.2.3.1, “SDRAM Sizesand Configurations” on page 3-13 for more details and programming examples.Table 3-21.SDRAM Boundary Register 0 - SBR0IOPAttributes31rvrvrv28 24 20 16 12 8 4 0rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rv rw rw rw rw rw rv rv rvPCIAttributesnananananananananananananananananananananananananananananananana<strong>Intel</strong> ® 80200 Processor Local Bus Address150CHAttribute Legend:RV = ReservedPR = PreservedRS = Read/SetRW = Read/WriteRC = Read ClearRO = Read OnlyNA = Not AccessibleBit Default Description31:08 000000H Reserved07:03 000000 2 SDRAM Boundary: Defines the upper limit of SDRAM bank 0.02:00 0H ReservedDeveloper’s Manual 3-49

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!