Intel 80312 I/O Companion Chip - ECEE

Memory Controller 3This chapter describes the integrated Memory Controller Unit (MCU). The operating modes,initialization, external interfaces, and implementation are detailed in this chapter.3.1 OverviewThe Intel ® 80312 I/O companion chip integrates a Memory Controller to provide a direct interfacebetween the Intel ® 80312 I/O companion chip and its local memory subsystem. The MemoryController supports 1 :• Up to 16 Mbytes of 8-bit Flash (8Mbyte/Bank)• Between 32 and 512 Mbytes of 64-bit Synchronous DRAM (SDRAM)• Single-bit error correction, double-bit and nibble detection support (ECC 2 )The Flash interface provides an 8-bit data bus, 23-bit address bus, and control to support up to two64 Mbit Bulk-Erase or Boot-Block Flash devices. The Flash devices provide storage for the Intel ®80312 I/O companion chip initialization code.The MCU provides a separate SDRAM interface from the Flash interface. The SDRAM interfaceprovides a direct connection to a high bandwidth and reliable memory subsystem. The SDRAMinterface consists of a 100 MHz, 64-bit wide data path to support 800 Mbytes/sec throughput. Inaddition, the SDRAM interface is designed to be compatible with 133 MHz technologies. An 8-bitError Correction Code (ECC) across each 64-bit word improves system reliability. The ECC isstored into the SDRAM array along with the data and is checked when the data is read. When thecode is incorrect, the MCU corrects the data (when possible) before reaching the initiator of theread. User-defined fault correction software is responsible for scrubbing the memory array.• The MCU supports two banks of SDRAM in the form of one unbuffered two-bank dual inlinememory module (DIMM 1 ) or two unbuffered single-bank DIMMs.• The MCU responds to internal bus memory accesses within its programmed address range andissues the memory request to either the Flash or SDRAM interface.• The MCU provides four chip enables to the memory subsystem. Two chip enables service theSDRAM subsystem (one per bank) and two service the Flash devices.1. The MCU does NOT support registered DIMMs.2. The MCU does NOT support non-ECC memory subsystems.Developer’s Manual 3-1