Intel 80312 I/O Companion Chip - ECEE

Intel ® 80312 I/O Companion ChipApplication Accelerator Unit10.9 Error ConditionsMaster Aborts that occur during a transfer are recorded by the Application Accelerator.When an error occurs, the actions taken are detailed below:• The AAU shall cease the ongoing transfer for the current chain descriptor and clear theApplication Accelerator Active flag in the ASR.• The AAU does not read any new chain descriptors.• The AAU sets the error flag in the Accelerator Status Register. For example; when an IBmaster-abort occurred during a transfer, the channel sets bit 5 in the ASR.• The AAU signals an interrupt to the Intel ® 80200 processor.• The Application Accelerator does not restart the transfer after an error condition. It is theresponsibility of the application software to reconfigure the AAU to complete any remainingtransfers.Note:Target-aborts that occur while the AAU is the master on the internal bus are recorded by the MCUand interrupt the Intel ® 80200 processor. For correct operation of the AAU, user software has todisable the AAU before clearing the error condition. Further, the AAU needs to be re-enabled bywriting a 1 to ACR.ae before initiating a new operation.There are three possible scenarios for multi-bit ECC errors on reads or writes. These errorsconditions are handled as detailed below:• Multi-bit ECC error on MCU Data Read: Refer to Chapter 3, “Memory Controller” fordetails on error handling in this instance.• Multi-bit ECC error on MCU Data Write: This instance covers the case where the first datawrite is less than a 64-bit value forcing the MCU to execute a read-modify-write operation.Refer to Chapter 3, “Memory Controller” for complete details.• Multi-bit ECC error on MCU Data Write: This instance covers the case where the last datawrite is less than a 64-bit value forcing the MCU to execute a read-modify-write operation.Refer to Chapter 3, “Memory Controller” for complete details.10-22 Developer’s Manual