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RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 3 CPU ARCHITECTURE<br />

(2) CALLT instruction table area<br />

The 64-byte area 00080H to 000BFH can store the subroutine entry address of a 2-byte call instruction (CALLT). Set<br />

the subroutine entry address to a value in a range of 00000H to 0FFFFH (because an address code is of 2 bytes).<br />

To use the boot swap function, set a CALLT instruction table also at 02080H to 020BFH.<br />

(3) Option byte area<br />

A 4-byte area of 000C0H to 000C3H can be used as an option byte area. Set the option byte at 020C0H to 020C3H<br />

when the boot swap is used. For details, see CHAPTER 27 OPTION BYTE.<br />

(4) On-chip debug security ID setting area<br />

A 10-byte area of 000C4H to 000CDH and 020C4H to 020CDH can be used as an on-chip debug security ID setting<br />

area. Set the on-chip debug security ID of 10 bytes at 000C4H to 000CDH when the boot swap is not used and at<br />

000C4H to 000CDH and 020C4H to 020CDH when the boot swap is used. For details, see CHAPTER 29 ON-CHIP<br />

DEBUG FUNCTION.<br />

R01UH0317EJ0004 Rev. 0.04 82<br />

Feb. 22, 2013

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