RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 1309 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 Retry-number 2 +1 where the retry-number is calculated according F0625 C0MDB502 - E - - - - - - - - - to the following method: (Abort under radix point) C0MDB6702 (CAN0 message data byte 67 register 02) - - E - - - - - - - - For read F0626 Min. (1/fCAN) 3/ (1/fCLK) Max. (1/fCAN) 4/ (1/fCLK) C0MDB602 - E - - - - - - - - - For 8 bit-write Min. (1/fCAN) 4/ (1/fCLK) F0627 C0MDB702 - E - - - - - - - - - Max. (1/fCAN) 5/ (1/fCLK) F0628 C0MDLC02 (CAN0 message data length register 02) - E - - - - - - - - - For 16 bit-write Min. (1/fCAN) 2/ (1/fCLK) F0629 C0MCONF02 (CAN0 message configuration register 02) - E - - - - - - - - - Max. (1/fCAN) 3/ (1/fCLK) F062A C0MIDL02 (CAN0 message ID register 02L) - - E - - - - - - - - F062C C0MIDH02 (CAN0 message ID register 02H) - - E - - - - - - - - F062E C0MCTRL02 (CAN0 message control register 02) - - E - - - - - - - - F0630 C0MDB0103 (CAN0 message data byte 01 register 03) - - E - - - - - - - - C0MDB003 - E - - - - - - - - - F0631 C0MDB103 - E - - - - - - - - - F0632 C0MDB2303 (CAN0 message data byte 23 register 03) - - E - - - - - - - - C0MDB203 - E - - - - - - - - - F0633 C0MDB303 - E - - - - - - - - - F0634 C0MDB4503 (CAN0 message data byte 45 register 03) - - E - - - - - - - - C0MDB403 - E - - - - - - - - - F0635 C0MDB503 - E - - - - - - - - - F0636 C0MDB6703 (CAN0 message data byte 67 register 03) - - E - - - - - - - - C0MDB603 - E - - - - - - - - - F0637 C0MDB703 - E - - - - - - - - - F0638 C0MDLC03 (CAN0 message data length register 03) - E - - - - - - - - - F0639 C0MCONF03 (CAN0 message Configuration register 03) - E - - - - - - - - - F063A C0MIDL03 (CAN0 message ID register 03L) - - E - - - - - - - - F063C C0MIDH03 (CAN0 message ID register 03H) - - E - - - - - - - - F063E C0MCTRL03 (CAN0 message control register 03) - - E - - - - - - - - 1309 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
R01UH0317EJ0004 Rev. 0.04 1310 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 Retry-number 2 +1 where the retry-number is calculated according C0MDB0104 (CAN0 message data byte 01 register 04) - - E - - - - - - - - to the following method: (Abort under radix point) For read F0640 C0MDB004 - E - - - - - - - - - Min. (1/fCAN) 3/ (1/fCLK) Max. (1/fCAN) 4/ (1/fCLK) F0641 C0MDB104 - E - - - - - - - - - For 8 bit-write C0MDB2304 (CAN0 message data byte 23 register 04) - - E - - - - - - - - Min. (1/fCAN) 4/ (1/fCLK) F0642 Max. (1/fCAN) 5/ (1/fCLK) For 16 bit-write C0MDB204 - E - - - - - - - - - Min. (1/fCAN) 2/ (1/fCLK) Max. (1/fCAN) 3/ (1/fCLK) F0643 C0MDB304 - E - - - - - - - - - F0644 C0MDB4504 (CAN0 message data byte 45 register 04) - - E - - - - - - - - C0MDB404 - E - - - - - - - - - F0645 C0MDB504 - E - - - - - - - - - F0646 C0MDB6704 (CAN0 message data byte 67 register 04) - - E - - - - - - - - C0MDB604 - E - - - - - - - - - F0647 C0MDB704 - E - - - - - - - - - F0648 C0MDLC04 (CAN0 message data length register 04) - E - - - - - - - - - F0649 C0MCONF04 (CAN0 message Configuration register 04) - E - - - - - - - - - F064A C0MIDL04 (CAN0 message ID register 04L) - - E - - - - - - - - F064C C0MIDH04 (CAN0 message ID register 04H) - - E - - - - - - - - F064E C0MCTRL04 (CAN0 message control register 04) - - E - - - - - - - - F0650 C0MDB0105 (CAN0 message data byte 01 register 05) - - E - - - - - - - - C0MDB005 - E - - - - - - - - - F0651 C0MDB105 - E - - - - - - - - - F0652 C0MDB2305 (CAN0 message data byte 23 register 05) - - E - - - - - - - - F0653 C0MDB305 - E - - - - - - - - - F0654 C0MDB4505 (CAN0 message data byte 45 register 05) - - E - - - - - - - - C0MDB405 - E - - - - - - - - - F0655 C0MDB505 - E - - - - - - - - - F0656 C0MDB6705 (CAN0 message data byte 67 register 05) - - E - - - - - - - - C0MDB605 - E - - - - - - - - - 1310 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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19.2 Configuration of DMA Controlle
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RL78/D1A User's Manual: Hardware - Renesas

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