RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 21 STANDBY FUNCTION
21.2.2 STOP mode
(1) STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction, and it can be set only when the CPU clock before the
setting was the high-speed on-chip oscillator clock, X1 clock, PLL clock or external main system clock.
Cautions 1. Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
2. When using the A/D converter in the SNOOZE mode, set up A/D converter mode register 2
(ADM2) before switching to the STOP mode. For details, see 11.3 Registers Used in A/D
Converter.
The operating statuses in the STOP mode are shown below.
R01UH0317EJ0004 Rev. 0.04 1083
Feb. 22, 2013