RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 5 CLOCK GENERATOR Figure 5-3. Format of Clock Operation Mode Control Register (CMC) Address: FFFA0H After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 CMC EXCLK OSCSEL 0 OSCSELS 0 AMPHS1 AMPHS0 AMPH EXCLK OSCSEL High-speed system clock pin operation mode X1/P121 pin X2/EXCLK/P122 pin 0 0 Input port mode Input port 0 1 X1 oscillation mode Crystal/ceramic resonator connection 1 0 Input port mode Input port 1 1 External clock input mode Input port External clock input OSCSELS Subsystem clock pin operation mode XT1/P123 pin XT2/P124 pin 0 Input port mode Input port 1 XT1 oscillation mode Crystal/ceramic resonator connection AMPHS1 AMPHS0 XT1 oscillator oscillation mode selection 0 0 Low power consumption oscillation (default) 0 1 Normal oscillation 1 0 Ultra-low power consumption oscillation 1 1 Setting prohibited AMPH Control of X1 clock oscillation frequency 0 1 MHz fX 10 MHz 1 10 MHz < fX 20 MHz Cautions 1. The CMC register can be written only once after reset release, by an 8-bit memory manipulation instruction. When using the CMC register with its initial value (00H), be sure to set the register to 00H after a reset ends in order to prevent malfunction due to a program loop. Such a malfunction becomes unrecoverable when a value other than 00H is mistakenly written. 2. After reset release, set the CMC register before X1 or XT1 oscillation is started as set by the clock operation status control register (CSC). 3. Be sure to set the AMPH bit to 1 if the X1 clock oscillation frequency exceeds 10 MHz. 4. Specify the settings for the AMPH, AMPHS1 and AMPHS0 bits while fIH is selected as fCLK after a reset ends (before fCLK is switched to fMX). 5. Oscillation stabilization time of fXT, counting on the software. 6. Although the maximum system clock frequency is 32 MHz, the maximum frequency of the X1 oscillator is 20 MHz. (Cautions and Remark are given on the next page.) R01UH0317EJ0004 Rev. 0.04 273 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 5 CLOCK GENERATOR 7. The XT1 oscillator is a circuit with low amplification in order to achieve lowpower consumption. Note the following points when designing the circuit. Pins and circuit boards include parasitic capacitance. Therefore, perform oscillation evaluation using a circuit board to be actually used and confirm that there are no problems. Make the wiring between the XT1 and XT2 pins and the resonators as short as possible, and minimize the parasitic capacitance and wiring resistance. Note this particularly when the ultra-low power consumption oscillation (AMPHS1, AMPHS0 = 1, 0) is selected. Configure the circuit of the circuit board, using material with little wiring resistance. Place a ground pattern that has the same potential as VSS as much as possible near the XT1 oscillator. Be sure that the signal lines between the XT1 and XT2 pins, and the resonators do not cross with the other signal lines. Do not route the wiring near a signal line through which a high fluctuating current flows. The impedance between the XT1 and XT2 pins may drop and oscillation may be disturbed due to moisture absorption of the circuit board in a high-humidity environment or dew condensation on the board. When using the circuit board in such an environment, take measures to damp-proof the circuit board, such as by coating. When coating the circuit board, use material that does not cause capacitance or leakage between the XT1 and XT2 pins. Remark fX: X1 clock frequency R01UH0317EJ0004 Rev. 0.04 274 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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34.2 64-pin products 1276 R5F10CLDx
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RL78/D1A User’s Manual: Hardware
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