RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 12 SERIAL ARRAY UNIT
12.3 Registers Controlling Serial Array Unit
Serial array unit is controlled by the following registers.
Peripheral enable register 0 (PER0)
Serial clock select register m (SPSm)
Serial mode register mn (SMRmn)
Serial communication operation setting register mn (SCRmn)
Serial data register mn (SDRmn)
Serial status register mn (SSRmn)
Serial flag clear trigger register mn (SIRmn)
Serial channel enable status register m (SEm)
Serial channel start register m (SSm)
Serial channel stop register m (STm)
Serial output enable register m (SOEm)
Serial output level register m (SOLm)
Serial output register m (SOm)
Serial communication pin select register (STSEL)
Port input mode registers 0, 1, 3, 5 to 7, 13 (PIM0, PIM1, PIM3, PIM5 to PIM7, PIM13)
Port output mode register (POM)
Port mode registers 0, 1, 3, 5 to 7 (PM0, PM1, PM3, PM5 to PM7)
Port registers 0, 1, 3, 5 to 7 (P0, P1, P3, P5 to P7)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1)
R01UH0317EJ0004 Rev. 0.04 566
Feb. 22, 2013