RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER (b) Write Figure 14-26. Format of CAN Global Module Control Register (C0GMCTRL, C1GMCTRL) (2/2) EFSD Bit Enabling Forced Shut Down 0 Forced shut down by GOM = 0 disabled. 1 Forced shut down by GOM = 0 enabled. Caution To request forced shutdown, the GOM bit must be cleared to 0 in a subsequent, immediately following write access after the EFSD bit has been set to 1. If access to another register (including reading the C0GMCTRL, C1GMCTRL register) is executed without clearing the GOM bit immediately after the EFSD bit has been set to 1, the EFSD bit is forcibly cleared to 0, and the forced shutdown request is invalid. When DMA is being performed, a request for a forced shut down might be ignored. Be sure to read the EFSD bit and confirm that forced shut down is enabled before issuing a forced shut down request. If forced shut down cannot be enabled because DMA is being performed, it is recommended to temporarily stop DMA. GOM Global Operation Mode Bit 0 CAN module is disabled from operating. 1 CAN module is enabled to operate. Caution The GOM bit can be cleared only in the initialization mode or immediately after EFSD bit is set (to 1). Set EFSD EFSD Bit Setting 0 No change in EFSD bit. 1 EFSD bit set to 1. Set GOM Clear GOM GOM Bit Setting 0 1 GOM bit cleared to 0. 1 0 GOM bit set to 1. Other than above No change in GOM bit. Caution Set GOM bit and EFSD bit always separately. R01UH0317EJ0004 Rev. 0.04 845 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER (3) CAN global module clock select register (C0GMCS, C1GMCS) The C0GMCS, C1GMCS register is used to select the CAN module system clock. Figure 14-27. Format of CAN Global Module Clock Select Register (C0GMCS, C1GMCS) Address: F05CEH (C0GMCS), F0342H (C1GMCS) After reset: 0FH R/W C0GMCS, C1GMCS 7 6 5 4 3 2 1 0 0 0 0 0 CCP3 CCP2 CCP1 CCP0 CCP3 CCP2 CCP1 CCP1 CAN Module System Clock (fCANMOD) 0 0 0 0 fCAN/1 0 0 0 1 fCAN/2 0 0 1 0 fCAN/3 0 0 1 1 fCAN/4 0 1 0 0 fCAN/5 0 1 0 1 fCAN/6 0 1 1 0 fCAN/7 0 1 1 1 fCAN/8 1 0 0 0 fCAN/9 1 0 0 1 fCAN/10 1 0 1 0 fCAN/11 1 0 1 1 fCAN/12 1 1 0 0 fCAN/13 1 1 0 1 fCAN/14 1 1 1 0 fCAN/15 1 1 1 1 fCAN/16 (Default value) Remark fCAN: Clock supplied to CAN (fMAIN) R01UH0317EJ0004 Rev. 0.04 846 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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34.2 64-pin products 1276 R5F10CLDx
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