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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 6 TIMER ARRAY UNIT<br />

(14) Noise filter clock select register (TNFCS0 to TNFCS2)<br />

Figure 6-29. Format of noise filter clock select register (TNFCS0 to TNFCS2)<br />

Address: F0062H After reset: 00H R/W<br />

Symbol 7 6 5 4 3 2 1 0<br />

TNFCS0 TNFCS07 TNFCS06 TNFCS05 TNFCS04 TNFCS03 TNFCS02 TNFCS01 TNFCS00<br />

Address: F0066H After reset: 00H R/W<br />

Symbol 7 6 5 4 3 2 1 0<br />

TNFCS1 TNFCS17 TNFCS16 TNFCS15 TNFCS14 TNFCS13 TNFCS12 TNFCS11 TNFCS10<br />

Address: F006AH After reset: 00H R/W<br />

Symbol 7 6 5 4 3 2 1 0<br />

TNFCS2 TNFCS27 TNFCS26 TNFCS25 TNFCS24 TNFCS23 TNFCS22 TNFCS21 TNFCS20<br />

TNFCSmn Noise filter clock for TImn (m:TAU unit No. n: channel No.)<br />

0 NFSMPm0 selected by TNFSMPm0[3-0]<br />

1 NFSMPm1 selected by TNFSMPm1[3-0]<br />

R01UH0317EJ0004 Rev. 0.04 354<br />

Feb. 22, 2013

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