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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> REVISION HISTORY<br />

Page<br />

CHAPTER 11 A/D CONVERTER<br />

Description<br />

(3/7)<br />

Classification<br />

p.505 Change of figure in Figure 11-1. Block Diagram of A/D Converter (c)<br />

p.506 Addition of description in 11.2 Configuration of A/D Converter (3) (c)<br />

p.510 Deletion of Note and Addition of Caution in Figure 11-3. Format of A/D Converter Mode Register 0 (c)<br />

p.511 Specified of word for note in Table 11-1. Settings of ADCS and ADCE Bits (a)<br />

p.512, 513 Change of Note and Addition of Caution in Figure 11-4. Timing Chart When A/D Voltage Comparator Is<br />

Used<br />

(c)<br />

p.514 to 517 Change and Addition of description in Table 11-3. A/D Conversion Time Selection (c)<br />

p.519 Change of description and Caution in Figure 11-6. Format of A/D Converter Mode Register 1 (ADM1) (c)<br />

p.519, 520 Change of description and Caution in Figure 11-7. Format of A/D Converter Mode Register 2 (ADM2) (c)<br />

p.521 Addition of remark in Figure 11-8. ADRCK Bit Interrupt Signal Generation Range (c)<br />

p.521 Addition of Note in (5) 10-bit A/D conversion result register (ADCR) (c)<br />

p.522 Addition of Note in (6) 8-bit A/D conversion result register (ADCRH) (c)<br />

p.523 Addition of Caution in Figure 11-11. Format of Analog Input Channel Specification Register (ADS) (c)<br />

p.524 Addition of Remark in Figure 11-14. Format of A/D Test Register (ADTES). (c)<br />

p.525 Addition of Cautions in Figure 11-15. Format of A/D Port Configuration Register (ADPC). (c)<br />

p.526 Addition of (12) Port mode registers (PM0 to PM9, PM13 to PM15) (c)<br />

p.528 Addition of Note in 11.4 A/D Converter Conversion Operations (c)<br />

p.531 to 542 Addition of description in 11.6.1 to 11.6.12 (c)<br />

p.531 to 542 Change of Figure 11-19 to 11-30 (c)<br />

p.544 Change of Figure 11-31. Setting up Software Trigger Mode (c)<br />

p.545 Change of Figure 11-32. Setting up <strong>Hardware</strong> Trigger No-Wait Mode (c)<br />

p.546 Change of Figure 11-33. Setting up <strong>Hardware</strong> Trigger Wait Mode (c)<br />

p.547 Change of Figure 11-34. Setting up Test Trigger Mode (c)<br />

p.548 Change of description and Caution in 11.8 SNOOZE Mode Function (c)<br />

p.549 Change of description in (1) If an interrupt is generated after A/D conversion ends (c)<br />

p.554 Change of description in (5) Analog input (ANIn) pins (c)<br />

p.556 Specified of values in Table 11-6. Resistance and Capacitance Values of Equivalent Circuit<br />

(Reference Values).<br />

(c)<br />

Remark “Classification” in the above table classifies revisions as follows.<br />

(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,<br />

(d): Addition/change of package, part number, or management division, (e): Addition/change of related<br />

documents<br />

R01UH0317EJ0004 Rev. 0.04 1329<br />

Feb. 22, 2013

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