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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 6 TIMER ARRAY UNIT<br />

(17) Timer input select else register (TISELSE)<br />

This register provides below selection function.<br />

(a) TAU unit 0 channel5 input selection<br />

The input source can be timer input signal (TI05) from port or internal/external clock.<br />

(b) Timer conjunction function of timer output to timer input just like 78K0/Dx2.<br />

TAU unit0 CH1 output can be connected to TAU unit0 CH0. This function is controlled by bit6.<br />

TAU unit2 CH1 output can be connected to TAU unit2 CH0. This function is controlled by bit7.<br />

This function is used for measuring speed or taco pulse. If only use timer caupture function to measure, there will<br />

be too many interrupts and increase the loading of software when input is higher (about 8kHz, 125us interrupt<br />

interval). So division of interrupt is necessary. At this usage, one timer is used as capture mode, its output is<br />

internally connected to another timer (operated as external event mode) to generate divided interrupt.<br />

(Refer to TMP2 and TMP3 conjunction function of 78K0/Dx2)<br />

Figure 6-36. Format of TISELSE Registers<br />

Address: FFF3E After reset: 00H R/W<br />

Symbol 7 6 5 4 3 2 1 0<br />

TISELSE TOTICON1 TOTICON0 0 0 0 0 TI05SEL1 TI05SEL0<br />

TI05SEL1 TI05SEL0 TIS051 TIS050 TAU unit0 CH5 input alternate selection<br />

0 0 0 0 P05<br />

0 0 0 1 P82<br />

0 0 1 0 P96<br />

0 1 x x Low-speed on-chip clock (fIL)<br />

1 0 x x Sub system clock (fSUB)<br />

1 1 x x Main external clock (fEX)<br />

Other than above Setting prohibited (same as “0000” setting)<br />

Considering the below purposes, every peripheral clock is connected to TI05 of TAU0<br />

Low-speed on-chip clock: For Frequency Detection of Safefy Function.<br />

Sub system clock: For the ultra accuracy trimming of high-speed on-chip oscillator Note<br />

External main clock: For the ultra accuracy trimming of high-speed on-chip oscillator without sub system clock Note<br />

Note: Count present operation frequency by timer. It is possible to change trimming code by access HIOTRM register.<br />

TOTICON0 Timer conjunction function control<br />

0 Cut off the connection of TAU unit0 CH1 output to CH0 input<br />

1 Connect TAU unit0 CH1 output to TAU unit0 CH0 input<br />

TOTICON1 Timer conjunction function control<br />

0 Cut off the connection of TAU unit2 CH1 output to CH0 input<br />

1 Connect TAU unit2 CH1 output to TAU unit2 CH0 input<br />

The connection with TOTICONn is used to count external event (pulse) input to TI01/TI21 in long term such as 16-bit<br />

counter is overflowed. Timer array unit 0 channel 1/timer array unit 2 channel 1 is worked as divider of input pulse and<br />

generates slower pulse to TO01/TO21. Timer array unit 0 channel 0/timer array unit 2 channel 0 is worked as external<br />

event counter. Its expected value should be made the calculated value according to timer array unit 0 channel 1/timer<br />

array unit 2 channel 1 divider setting.<br />

R01UH0317EJ0004 Rev. 0.04 367<br />

Feb. 22, 2013

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