RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 14 CAN CONTROLLER
BOFF bit
in C0INFO, C1INFO
register
OPMODE[2:0]
in C0CTRL, C1CTRL
register
(user writings)
OPMODE[2:0]
in C0CTRL, C1CTRL
register
(user readings)
TEC[7:0]
in C0ERC, C1ERC
register
REPS, REC[6:0]
in C0ERC, C1ERC
register
Figure 14-17. Recovery Operation from Bus-off State through Normal Recovery Sequence
»error-passive«
TEC > FFH
80H ≤ TEC[7:0] ≤ FFH
≠ 00H 00H
≠ 00H
≠ 00H
»bus-off« »bus-off-recovery-sequence« »error-active«
FFH < TEC [7:0]
80H ≤ REPS, REC[6:0] ≤ FFH
00H ≠ 00H
R01UH0317EJ0004 Rev. 0.04 803
Feb. 22, 2013
00H
Undefined
00H ≤ TEC[7:0] < 80H
00H ≤ REPS, REC[6:0] < 80H
(b) Forced recovery operation that skips bus-off recovery sequence
The CAN module can be forcibly released from the bus-off state, regardless of the bus state, by skipping the
bus-off recovery sequence. Here is the procedure.
First, the CAN module requests to enter the initialization mode. For the operation and points to be noted at
this time, refer to (a) Recovery operation from bus-off state through normal recovery sequence.
Next, the module requests to enter an operation mode. At the same time, the CCERC bit of the C0CTRL,
C1CTRL register must be set to 1.
As a result, the bus-off recovery sequence defined by the CAN protocol ISO 11898 is skipped, and the
module immediately enters the operation mode. In this case, the module is connected to the CAN bus after it
has monitored 11 consecutive recessive-level bits. For details, refer to the processing in Figure 14-82.
Caution This function is not defined by the CAN protocol ISO 11898. When using this function,
thoroughly evaluate its effect on the network system.
(6) Initializing CAN module error counter register (C0ERC, C1ERC) in initialization mode
If it is necessary to initialize the CAN module error counter register (C0ERC, C1ERC) and CAN module
information register (C0INFO, C1INFO) for debugging or evaluating a program, they can be initialized to the
default value by setting the CCERC bit of the C0CTRL, C1CTRL register in the initialization mode. When
initialization has been completed, the CCERC bit is automatically cleared to 0.
Cautions 1. This function is enabled only in the initialization mode. Even if the CCERC bit is set to 1 in
a CAN operation mode, the C0ERC, C1ERC and C0INFO, C1INFO registers are not
initialized.
2. The CCERC bit can be set at the same time as the request to enter a CAN operation mode.