RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 4 PORT FUNCTIONS
4.2.7 Port 6
48-pin products: P60 and P61 function as a 2-bit I/O port.
64-pin products: P60 and P61 function as a 2-bit I/O port.
80-pin products: P60, 61, 65, and P66 function as a 4-bit I/O port.
100-pin products: P60 to P66 function as a 7-bit I/O port.
Port 6 is a 7-bit, a 4-bit, or 2-bit I/O port with an output latch. Port 6 can be set to the input mode or output mode in 1-bit
units using port mode register 6 (PM6). When the P60 to P66 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 6 (PU6).
Input to the P61 and P63 pins can be specified through a normal Schmitt3 input buffer or a Schmitt1 input buffer using
port input mode register 5 (PIM5).
Output from the P60 and P61 pins can be specified as normal CMOS output or N-ch open-drain output (VDD tolerance),
using port output mode register (POM).
These pins also function as serial interface data I/O, timer I/O, real-time clock correction clock output, clock / buzzer
output, and external interrupt request input.
To use P60 to P66 as the port function, refer Table 4-7.
P60
P61
P62
P63
P64
P65
P66
P60 to P66 Pins Alternate function
port function Timer Serial
Table 4-7. Setting of P60 to P66 Pins to port function
R01UH0317EJ0004 Rev. 0.04 173
Feb. 22, 2013
PM6
Register
PIM6
Register
POM
Register
Input port - - Input mode N/A
-
Output port 0 1 Output mode
Input port - - Input mode
Output port 0 1 Output mode -
Input port - - Input mode
Output port 0 1 Output mode
Input port - N/A Input mode
Output port 0
Input port - N/A Input mode
Output port 0
Output mode -
Output mode
Input port - N/A Input mode
Output port 0
Output mode
Input port - N/A Input mode
Output port 0
Reset signal generation sets port 6 to input mode.
Figures 4-22 to 4-27 show block diagrams of port6.
Output mode
Remarks
0 CMOS output
1 N-ch OD output
0 - Schmitt1 input
1
N/A N/A
Schmitt3 input
0 CMOS output
1 N-ch OD output
0 N/A
Schmitt1 input
1 Schmitt3 input
N/A N/A
N/A N/A
N/A N/A