RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER No Figure 14-85. Forced Shutdown Process START Set EFSD bit Clear GOM bit GOM = 0? END Yes Shutdown successful GOM = 0, EFSD = 0 Must be a subsequent write Caution Do not read- or write-access any registers by software between setting the EFSD bit and clearing the GOM bit. Note that, if interrupt or DMA occurs, it is not regarded as a sequential access and the forced shutdown request is invalidated. R01UH0317EJ0004 Rev. 0.04 941 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER Figure 14-86. Error Handling START Error interrupt CINTS2 = 1? Yes Check CAN module state (read C0INFO register) Clear CINTS2 bit CINTS3 = 1? Yes Check CAN protocol error state (read C0LEC register) Clear CINTS3 bit CINTS4 = 1? END Yes Clear CINTS4 bit R01UH0317EJ0004 Rev. 0.04 942 Feb. 22, 2013 No No No
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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14.9.1 Message reception ..........
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19.2 Configuration of DMA Controlle
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28.1.1 Programming Environment.....
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RL78/D1A User’s Manual: Hardware
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