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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 15 STEPPER MOTOR CONTROLLER/DRIVER<br />

Caution Bit 6 must be 0.<br />

Figure 15-2. Format of Timer Mode Control Register (MCNTC0) (2/2)<br />

SMCL2 SMCL1 SMCL0 Selected timer count clock<br />

0 0 0 fCLK<br />

0 0 1 fCLK/2<br />

0 1 0 fCLK/2 2<br />

0 1 1 fCLK/2 3<br />

1 0 0 fCLK/2 4<br />

1 0 1 fCLK/2 5<br />

1 1 0 fCLK/2 6<br />

1 1 1 fCLK/2 7<br />

Power save mode preparation<br />

Before entering any power save mode the Stepper-C/D must be shut down in advance in order to minimize power<br />

consumption.<br />

Apply following sequence to shut down the Stepper-C/D:<br />

1. Stop the counter CNT0 by setting MCNTC0.PCE = 0.<br />

2. Disable the Stepper-C/D operation by setting MCNTC0.CAE = 0.<br />

Remark Note that the MCNTC0.PCE and MCNTC0.CAE bits must not be cleared to 0 by a single write instruction.<br />

Perform two write instructions as shown above.<br />

R01UH0317EJ0004 Rev. 0.04 950<br />

Feb. 22, 2013

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