RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 4 PORT FUNCTIONS TIS271 TIS270 Figure 4-66. Format of TOS20 and TOS21 Registers (2/2) TI27 (TAU unit2 CH7) alternate pin selection 0 0 P93 0 1 P37 1 0 P62 Other than above Setting prohibited (same as “00” setting) Considering direct LED driving, or other large current application, 16-bit resolution PWM outputs are also alternated to the SM pins. When configure pin function, the policy is that odd TO (ch1,3,5,7) of TAU should be output with higher priority. In addition, 4 kinds of output with different periods using different master CH’s can be achieved if by this means. (3) Timer input select else register (TISELSE) This register provides below selection function. (a) TAU unit 0 channel5 input selection The input source can be timer input signal (TI05) from port or internal/external clock. (b) Timer conjunction function of timer output to timer input just like 78K0/Dx2. TAU unit0 CH1 output can be connected to TAU unit0 CH0. This function is controlled by bit6. TAU unit2 CH1 output can be connected to TAU unit2 CH0. This function is controlled by bit7. This function is used for measuring speed or taco pulse. If only use timer caupture function to measure, there will be too many interrupts and increase the loading of software when input is higher (about 8kHz, 125us interrupt interval). So division of interrupt is necessary. At this usage, one timer is used as capture mode, its output is internally connected to another timer (operated as external event mode) to generate divided interrupt. (Refer to TMP2 and TMP3 conjunction function of 78K0/Dx2) Figure 4-67. Format of TISELSE Registers Address: FFF3E After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 TISELSE TOTICON1 TOTICON0 0 0 0 0 TI05SEL1 TI05SEL0 TI05SEL1 TI05SEL0 TIS051 TIS050 TAU unit0 CH5 input alternate selection 0 0 0 0 P05 0 0 0 1 P82 0 0 1 0 P96 0 1 x x Low-speed on-chip clock (fIL) 1 0 x x Sub system clock (fSUB) 1 1 x x Main external clock (fEX) Other than above Setting prohibited (same as “0000” setting) Considering the below purposes, every peripheral clock is connected to TI05 of TAU0 Low-speed on-chip clock: For Frequency Detection of Safefy Function. Sub system clock: For the ultra accuracy trimming of high-speed on-chip oscillator Note External main clock: For the ultra accuracy trimming of high-speed on-chip oscillator without sub system clock Note Note: Count present operation frequency by timer. It is possible to change trimming code by access HIOTRM register. R01UH0317EJ0004 Rev. 0.04 247 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 4 PORT FUNCTIONS TOTICON0 Timer conjunction function control 0 Cut off the connection of TAU unit0 CH1 output to CH0 input 1 Connect TAU unit0 CH1 output to TAU unit0 CH0 input TOTICON1 Timer conjunction function control 0 Cut off the connection of TAU unit2 CH1 output to CH0 input 1 Connect TAU unit2 CH1 output to TAU unit2 CH0 input The connection with TOTICONn is used to count external event (pulse) input to TI01/TI21 in long term such as 16-bit counter is overflowed. Timer array unit 0 channel 1/timer array unit 2 channel 1 is worked as divider of input pulse and generates slower pulse to TO01/TO21. Timer array unit 0 channel 0/timer array unit 2 channel 0 is worked as external event counter. Its expected value should be made the calculated value according to timer array unit 0 channel 1/timer array unit 2 channel 1 divider setting. R01UH0317EJ0004 Rev. 0.04 248 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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34.2 64-pin products 1276 R5F10CLDx
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RL78/D1A User’s Manual: Hardware
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