RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)
13.5.11 Transmission start wait function
The RL78/D1A is provided with a function to guarantee the stop bit length of reception when reception is switched to
transmission to perform LIN communication.
To delay starting of transmission until completion of the stop bit of reception, write data to the UFnWTX register which is
a wait-dedicated register, instead of writing transmit data to the UFnTX register as a transmission start request.
In this case, starting transmission is being waited for one bit until the stop bit of receive data has ended for sure.
Note that only a wait of one bit is performed, even if the stop bit length has been set to two bits by using the stop bit
length select bit (UFnSL).
LTxDn pin
LRxDn pin
Sampling
point
LTxDn pin
LRxDn pin
Sampling
point
Figure 13-48. When Transmit Data Has Been Written During Stop Bit of Receive Data
START
Half the
reception
baud rate
clock period
Half the
reception
baud rate
clock period
Reception baud rate
clock period
BIT0
UFnTX is written
STOP
START BIT0
STOP
Reception baud rate
clock period
START BIT0
Half the
reception
baud rate
clock period
START BIT0
STOP is shortened
UFnWTX is written
STOP length of 1 bit is guaranteed
Reception baud rate
clock period
START
START
Half the
reception
baud rate
clock period
Cautions 1. When LIN communication is not performed, accessing the UFnWTX register is prohibited.
2. Writing to the UFnWTX register is prohibited except when reception is switched to transmission
(such as during transmission).
Remark n = 0, 1
R01UH0317EJ0004 Rev. 0.04 748
Feb. 22, 2013