04.03.2013 Views

RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)<br />

(11) 8-bit transmit data register for LIN-UARTn wait (UFnWTX)<br />

The UFnWTX register is a 16-bit register dedicated to delaying starting transmission until the stop bit of reception<br />

is completed during a LIN communication.<br />

This register is write-only, in 16-bit units. When the UFnWTX register is write in 8-bit units, it can be accessed as<br />

the UFnWTXB register.<br />

The stop bit length of reception when reception is switched to transmission is guaranteed for the UFnWTX register.<br />

See 13.5.11 Transmission start wait function for details.<br />

The UFnTX register value will be read when the UFnWTX register has been read.<br />

Reset input sets this register to 0000H.<br />

Figure 13-11. Format of 8-bit transmit data register for LIN-UARTn wait (UFnWTX)<br />

Address: F024AH, F024BH (UF0WTX), F026AH, F026BH (UF1WTX) After reset: 0000H W<br />

15 14 13 12 11 10 9 8<br />

UFnWTX 0 0 0 0 0 0 0 UFnWTX8<br />

(n = 0, 1) 7 6 5 4 3 2 1 0<br />

UFnWTX7 UFnWTX6 UFnWTX5 UFnWTX4 UFnWTX3 UFnWTX2 UFnWTX1 UFnWTX0<br />

Cautions 1. Writing to the UFnWTX register is prohibited other than when reception is switched to<br />

transmission (such as during transmission).<br />

2. When the UFnWTX register is accessed in 8-bit units (when the UFnWTXB register is<br />

accessed), “0” is written to the UFnWTX8 bit.<br />

3. Writing to the UFnWTX register is prohibited when using the UFnBUF0 to UFnBUF8 registers.<br />

Remark The UFnWTX8 bit is an expansion bit when expansion bits are enabled (UFnEBE = UFnCL = 1).<br />

R01UH0317EJ0004 Rev. 0.04 705<br />

Feb. 22, 2013

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!