RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 7 REAL-TIME CLOCK (13) Watch error correction register (SUBCUD) This register is used to correct the watch with high accuracy when it is slow or fast by changing the value that overflows from the sub-count register to the second count register (SEC) (reference value: 7FFFH). The SUBCUD register can be set by an 8-bit memory manipulation instruction. Reset signal generation clears this register to 00H. Address: FFF59H After reset: 00H R/W Figure 7-15. Format of Watch Error Correction Register (SUBCUD) Symbol 7 6 5 4 3 2 1 0 SUBCUD DEV F6 F5 F4 F3 F2 F1 F0 DEV Setting of watch error correction timing 0 Corrects watch error when the second digits are at 00, 20, or 40 (every 20 seconds). 1 Corrects watch error only when the second digits are at 00 (every 60 seconds). Writing to the SUBCUD register at the following timing is prohibited. When DEV = 0 is set: For a period of SEC = 00H, 20H, 40H When DEV = 1 is set: For a period of SEC = 00H F6 Setting of watch error correction value 0 Increases by {(F5, F4, F3, F2, F1, F0) – 1} 2. 1 Decreases by {(/F5, /F4, /F3, /F2, /F1, /F0) + 1} 2. When (F6, F5, F4, F3, F2, F1, F0) = (*, 0, 0, 0, 0, 0, *), the watch error is not corrected. * is 0 or 1. /F5 to /F0 are the inverted values of the corresponding bits (000011 when 111100). Range of correction value: (when F6 = 0) 2, 4, 6, 8, … , 120, 122, 124 (when F6 = 1) -2, -4, -6, -8, … , -120, -122, -124 The range of value that can be corrected by using the watch error correction register (SUBCUD) is shown below. DEV = 0 (correction every 20 seconds) DEV = 1 (correction every 60 seconds) Correctable range -189.2 ppm to 189.2 ppm -63.1 ppm to 63.1 ppm Maximum excludes quantization error 1.53 ppm 0.51 ppm Minimum resolution 3.05 ppm 1.02 ppm Remark If a correctable range is -63.1 ppm or lower and 63.1 ppm or higher, set 0 to DEV. R01UH0317EJ0004 Rev. 0.04 471 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 7 REAL-TIME CLOCK (14) Alarm minute register (ALARMWM) This register is used to set minutes of alarm. The ALARMWM register can be set by an 8-bit memory manipulation instruction. Reset signal generation clears this register to 00H. Caution Set a decimal value of 00 to 59 to this register in BCD code. If a value outside the range is set, the alarm is not detected. Address: FFF5AH After reset: 00H R/W Figure 7-16. Format of Alarm Minute Register (ALARMWM) Symbol 7 6 5 4 3 2 1 0 ALARMWM 0 WM40 WM20 WM10 WM8 WM4 WM2 WM1 (15) Alarm hour register (ALARMWH) This register is used to set hours of alarm. The ALARMWH register can be set by an 8-bit memory manipulation instruction. Reset signal generation clears this register to 12H. However, the value of this register is 00H if the AMPM bit is set to 1 after reset. Caution Set a decimal value of 00 to 23, 01 to 12, or 21 to 32 to this register in BCD code. If a value outside the range is set, the alarm is not detected. Address: FFF5BH After reset: 12H R/W Figure 7-17. Format of Alarm Hour Register (ALARMWH) Symbol 7 6 5 4 3 2 1 0 ALARMWH 0 0 WH20 WH10 WH8 WH4 WH2 WH1 Caution Bit 5 (WH20) of the ALARMWH register indicates AM(0)/PM(1) if AMPM = 0 (if the 12-hour system is selected). (16) Alarm week register (ALARMWW) This register is used to set date of alarm. The ALARMWW register can be set by an 8-bit memory manipulation instruction. Reset signal generation clears this register to 00H. Address: FFF5CH After reset: 00H R/W Figure 7-18. Format of Alarm Week Register (ALARMWW) Symbol 7 6 5 4 3 2 1 0 ALARMWW 0 WW6 WW5 WW4 WW3 WW2 WW1 WW0 R01UH0317EJ0004 Rev. 0.04 472 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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