RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 1 OUTLINE
1.7 Outline of Functions
Item
R5F10CGBxFB
R5F10CGCxFB
R5F10CGDxFB
48-pin 64-pin 80-pin 100-pin
R5F10DGCxFB
R5F10DGDxFB
R5F10DGExFB
R5F10CLDxFB
R5F10DLDxFB
ROM RAM
ROM 256 KB 16 KB
/RAM
128 KB 8 KB
capacities
96 KB 6 KB
64 KB 4 KB
48 KB 3 KB
32 KB 2 KB
24 KB 2 KB
Data flash memory 8 KB
Memory space 1 MB
General-purpose register 8 bits 32 registers (8 bits 8 registers 4 banks)
Main High-speed system 1 to 20 MHz (VDD = 2.7 V to 5.5 V)
System clock
clock
High-speed on- 4/8/16/24/32 MHz (TA = -40 to 85C)
chip oscillation
clock
4/8/16/24 MHz (TA = -40 to 105C)
PLL 4 MHz 16/2 = 32 MHz, 8 MHz 16/4 = 32 MHz (TA= -40 to 85C)
4 MHz 12/2 = 24 MHz, 8 MHz 12/4 = 24 MHz (TA= -40 to 105C)
Subsystem clock 32.768kHz
Low-speed on-chip oscillation
clock
15 kHz
Minimum instruction
execution time
R01UH0317EJ0004 Rev. 0.04 22
Feb. 22, 2013
R5F10DLExFB
R5F10CMDxFB
R5F10CMExFB
R5F10DMDxFB
0.03125 s (Main system clock 32 MHz TA = -40 to +85C)
0.04167 s (Main system clock 24 MHz TA = -40 to 105C)
30.5 s (Subsystem clock 32.768 kHz operation)
Instruction set 8-bit operation,16-bit operation
Multiplication (8 bits 8 bits)
Bit manipulation (Set, reset, test, and Boolean operation), etc.
I/O port Total number of port 38 54 68 84
CMOS I/O port 35 49 63 78
N-ch open-drain
Selectable port
4 6
LED direct drive
port
9 13 16
CMOS input port 3 5
CMOS output port 0 1
Timer 16-bit timer 8 ch 3 units
Real-time clock (RTC) 1 ch
Interval timer 1 ch
Watchdog timer (WDT) 1 ch
Timer output 19 21 24
RTC output 1
Clock output/buzzer output 1
10-bit resolution A/D converter 3+2 6+2 7+2
R5F10DMExFB
R5F10DMFxFB
R5F10DMGxFB
R5F10DMJxFB
R5F10DPExFB
R5F10DPFxFB
R5F10DPGxFB
R5F10TPJxFB
(1/2)
R5F10DPJxFB