RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 5 CLOCK GENERATOR Figure 5-18 shows examples of incorrect resonator connection. Figure 5-18. Examples of Incorrect Resonator Connection (1/2) (a) Too long wiring (b) Crossed signal line VSS X1 X2 X1 R01UH0317EJ0004 Rev. 0.04 293 Feb. 22, 2013 NG NG NG PORT VSS X2 (c) The X1 and X2 signal line wires cross. (d) A power supply/GND pattern exists under the X1 and X2 wires. VSS X1 X2 VSS X1 X2 Note Power supply/GND pattern Note Do not place a power supply/GND pattern under the wiring section (section indicated by a broken line in the figure) of the X1 and X2 pins and the resonators in a multi-layer board or double-sided board. Do not configure a layout that will cause capacitance elements and affect the oscillation characteristics. Remark When using the subsystem clock, replace X1 and X2 with XT1 and XT2, respectively. Also, insert resistors in series on the XT2 side.
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 5 CLOCK GENERATOR Figure 5-18. Examples of Incorrect Resonator Connection (2/2) (e) Wiring near high alternating current (f) Current flowing through ground line of oscillator (potential at points A, B, and C fluctuates) VSS X1 X2 (g) Signals are fetched VSS X1 X2 High current VSS X1 X2 A B C High current Caution When X2 and XT1 are wired in parallel, the crosstalk noise of X2 may increase with XT1, resulting in malfunctioning. Remark When using the subsystem clock, replace X1 and X2 with XT1 and XT2, respectively. Also, insert resistors in series on the XT2 side. R01UH0317EJ0004 Rev. 0.04 294 Feb. 22, 2013 Pmn VDD
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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