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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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<br />

Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 3 CPU ARCHITECTURE<br />

Table 3-6. Extended SFR (2nd SFR) List (2/26)<br />

Address Special Function Register (SFR) Name Symbol R/W Manipulable Bit Range After Reset<br />

1-bit 8-bit 16-bit<br />

F0070H Timer input select register 00 TIS00 R/W 00H<br />

F0071H Timer input select register 01 TIS01 R/W 00H<br />

F0072H Timer input select register 10 TIS10 R/W 00H<br />

F0073H Timer input select register 11 TIS11 R/W 00H<br />

F0074H Timer input select register 20 TIS20 R/W 00H<br />

F0075H Timer input select register 21 TIS21 R/W 00H<br />

F0076H Timer output select register 00 TOS00 R/W 00H<br />

F0077H Timer output select register 01 TOS01 R/W 00H<br />

F0078H Illegal-memory access detection control register IAWCTL R/W 00H<br />

F0079H Timer output select register 10 TOS10 R/W 00H<br />

F007AH Timer output select register 11 TOS11 R/W 00H<br />

F007BH Timer output select register 20 TOS20 R/W 00H<br />

F007CH Timer output select register 21 TOS21 R/W 00H<br />

F0090H Data flash control register DFLCTL R/W 00H<br />

F00A0H High-speed on-chip oscillator trimming register HIOTRM R/W Undefined Note<br />

F00E0H Multiplication/division data register C (L) MDCL R/W 0000H<br />

F00E2H Multiplication/division data register C (H) MDCH R/W 0000H<br />

F00E8H Multiplication/division control register MDUC R/W 00H<br />

F00F0H Peripheral enable register 0 PER0 R/W 00H<br />

F00F1H Peripheral enable register 1 PER1 R/W 00H<br />

F00F2H Peripheral clock select register PCKSEL R/W 00H<br />

F00F3H Operation speed mode control register OSMC R/W 00H<br />

F00F5H RAM parity error control register RPECTL R/W 00H<br />

F00F8H FMP clock division selction register MDIV R/W 00H<br />

F00F9H RTC clock selection register RTCCL R/W 00H<br />

F00FAH CLM reset control flag register RESFCLM R Undefined<br />

F00FBH POC reset confirm register POCRES R/W 00H<br />

F00FCH Specific register manipulation protection register GUARD R/W 00H<br />

F00FEH BCD adjust result register BCDADJ R Undefined<br />

F0100H Serial status register 00 SSR00 R 0000H<br />

SSR00L R <br />

F0102H Serial status register 01 SSR01 R 0000H<br />

SSR01L R <br />

F0104H Serial flag clear trigger register 00 SIR00L SIR00 R/W 0000H<br />

F0106H Serial flag clear trigger register 01 SIR01L SIR01 R/W 0000H<br />

F0108H Serial mode register 00 SMR00 R/W 0020H<br />

F010AH Serial mode register 01 SMR01 R/W 0020H<br />

F010CH Serial communication operation setting register 00 SCR00 R/W 0087H<br />

F010EH Serial communication operation setting register 01 SCR01 R/W 0087H<br />

F0110H Serial channel enable status register 0 SE0L SE0 R 0000H<br />

F0112H Serial channel start trigger register 0 SS0L SS0 R/W 0000H<br />

F0114H Serial channel stop trigger register 0 ST0L ST0 R/W 0000H<br />

F0116H Serial clock select register 0 SPS0L SPS0 R/W 0000H<br />

F0118H Serial output register 0 SO0 R/W 0303H<br />

F011AH Serial output enabel register 0<br />

Note The reset value differs for each chip.<br />

SOE0L SOE0 R/W 0000H<br />

R01UH0317EJ0004 Rev. 0.04 106<br />

Feb. 22, 2013

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