RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER 14.15 Baud Rate Settings 14.15.1 Baud rate settings Make sure that the settings are within the range of limit values for ensuring correct operation of the CAN controller, as follows. (a) 5TQ SPT (sampling point) 17TQ SPT = TSEG1 + 1TQ (b) 8TQ DBT (data bit time) 25TQ DBT = TSEG1 + TSEG2 + 1TQ = TSEG2 + SPT (c) 1TQ SJW (synchronization jump width) 4TQ SJW DBT – SPT (d) 4TQ TSEG1 16TQ [3 (Setting value of TSEG1 [3:0] 15] (e) 1TQ TSEG2 8TQ [0 (Setting value of TSEG2 [2:0] 7] Remark TQ = 1/fTQ (fTQ: CAN protocol layer basic system clock) TSEG1 [3:0]: Bits 3 to 0 of CAN0 bit rate register (C0BTR) TSEG2 [2:0]: Bits 10 to 8 of CAN0 bit rate register (C0BTR) Table 14-22 shows the combinations of bit rates that satisfy the above conditions. R01UH0317EJ0004 Rev. 0.04 911 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER DBT Length SYNC SEGMENT Table 14-22. Settable Bit Rate Combinations (1/3) Valid Bit Rate Setting C0BTR Register Setting Value PROP SEGMENT PHASE SEGMENT1 PHASE SEGMENT2 TSEG1[3:0] TSEG2[2:0] Sampling Point (Unit %) 25 1 8 8 8 1111 111 68.0 24 1 7 8 8 1110 111 66.7 24 1 9 7 7 1111 110 70.8 23 1 6 8 8 1101 111 65.2 23 1 8 7 7 1110 110 69.6 23 1 10 6 6 1111 101 73.9 22 1 5 8 8 1100 111 63.6 22 1 7 7 7 1101 110 68.2 22 1 9 6 6 1110 101 72.7 22 1 11 5 5 1111 100 77.3 21 1 4 8 8 1011 111 61.9 21 1 6 7 7 1100 110 66.7 21 1 8 6 6 1101 101 71.4 21 1 10 5 5 1110 100 76.2 21 1 12 4 4 1111 011 81.0 20 1 3 8 8 1010 111 60.0 20 1 5 7 7 1011 110 65.0 20 1 7 6 6 1100 101 70.0 20 1 9 5 5 1101 100 75.0 20 1 11 4 4 1110 011 80.0 20 1 13 3 3 1111 010 85.0 19 1 2 8 8 1001 111 57.9 19 1 4 7 7 1010 110 63.2 19 1 6 6 6 1011 101 68.4 19 1 8 5 5 1100 100 73.7 19 1 10 4 4 1101 011 78.9 19 1 12 3 3 1110 010 84.2 19 1 14 2 2 1111 001 89.5 18 1 1 8 8 1000 111 55.6 18 1 3 7 7 1001 110 61.1 18 1 5 6 6 1010 101 66.7 18 1 7 5 5 1011 100 72.2 18 1 9 4 4 1100 011 77.8 18 1 11 3 3 1101 010 83.3 18 1 13 2 2 1110 001 88.9 18 1 15 1 1 1111 000 94.4 R01UH0317EJ0004 Rev. 0.04 912 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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