RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 675 Feb. 22, 2013 SE 01 Note1 MD 012 MD 011 Table 12-8. Relationship between register settings and pins (Channel 1 of unit 0: CSI01, SCSI010 = 1) SOE 01 SO 01 CKO 01 TXE 01 RXE 01 0 0 0 0 1 1 0 0 Note2 PM56 P56 PM55 P55 PM54 P54 Operation mode Note2 Note2 Note2 Note2 1 0 0 0 1 1 0 1 1 1 Note2 1 0/1 Note3 1 0/1 Note3 1 1 0 1 Note2 Note2 Note2 Note2 Operation stop mode Slave CSI01 reception 0 1 Slave CSI01 transmission 1 1 1 1 1 0 1 Slave CSI01 transmission/ reception 0 1 0/1 0 1 0 1 1 Note2 1 0/1 Note3 0/1 Note3 1 0/1 Note3 0/1 Note3 1 0 0 1 Note2 Note2 Note2 Master CSI01 reception 0 1 Master CSI01 transmission 1 1 0 1 1 0 1 Master CSI01 transmission/ reception P56/TI16/ TO16/ SCK01 P56/TI16/ TO16/ SCK01 (input) SCK01 (input) SCK01 (input) SCK01 (output) SCK01 (output) SCK01 (output) Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers. 2. This pin can be set as a port function pin or other alternate function pin. 3. This is 0 or 1, depending on the communication operation. For details, refer to 12.3 (12) Serial output register m (SOm). Pin Function P55/TI15/ TO15/SI01 P55/TI15/ TO15 SI01 P55/TI15/ TO15 P54/TI14/ TO14/SO01 P54/TI14/ TO14 P54/TI14/ TO14 SO01 SI01 SO01 SI01 P55/TI15/ TO15 P54/TI14/ TO14 SO01 SI01 SO01 675 RL78/D1A CHAPTER 12 SERIAL ARRAY UNIT Specifications in this document are tentative and subject to change. Under development Preliminary document
R01UH0317EJ0004 Rev. 0.04 676 Feb. 22, 2013 SE 10 Note1 MD 102 MD 101 SOE 10 Table 12-9. Relationship between register settings and pins (Channel 0 of unit 1: CSI10, SCSI100 = 0) SO 10 CKO 10 TXE 10 RXE 10 PM 10 P133 PM 132 P132 PM 131 P131 Operation mode P133/SCK10/ TI22/TO22 Pin Function P132/SI10/ LRxD1/INTPLR1 /TI20/TO20 P131/SO10/ LTxD1/TI21/ TO21 0 0 0 0 1 1 0 0 Note2 Note2 Note2 Note2 Note2 Note2 Operation stop mode P132/INTP4/ CTxD/LTxD1/ P132/INTP5/ LRxD1/ P131/TI21/ TO21 TI00/P133/ INTPLR1/TI20/ TI22/TO22 TO20 1 0 0 0 1 1 0 1 1 1 Note2 Note2 Slave CSI10 reception SCK10 (input) SI10 P131/TI21/ TO21 1 0/1 Note3 1 1 1 1 Note2 Note2 0 1 Slave CSI10 transmission SCK10 (input) P132/INTP5/ TI20/TO20 SO10 1 0/1 Note3 1 1 1 1 1 0 1 Slave CSI10 transmission/ reception SCK10 (input) SI10 SO10 0 1 0/1 0 1 0 1 1 Note2 Note2 Master CSI10 reception SCK10 (output) SI10 P131/TI21/ TO21 1 0/1 Note3 0/1 Note3 1 0 0 1 Note2 Note2 0 1 Master CSI10 transmission SCK10 (output) P132/INTP5/ TI20/TO20 SO10 1 0/1 Note3 0/1 Note3 1 1 0 1 1 0 1 Master CSI10 transmission/ reception SCK10 (output) SI10 SO10 Notes 1. The SE1 register is a read-only status register which is set using the SS1 and ST1 registers. 2. This pin can be set as a port function pin or other alternate function pin. 3. This is 0 or 1, depending on the communication operation. For details, refer to 12.3 (12) Serial output register m (SOm). Caution The shaded pins are provided at two ports. Select either port by using the corresponding register. 676 RL78/D1A CHAPTER 12 SERIAL ARRAY UNIT Specifications in this document are tentative and subject to change. Under development Preliminary document
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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