RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A REVISION HISTORY Page CHAPTER 25 SAFETY FUNCTIONS Description (7/7) Classification p.1134 Change of description and Addition of Caution in 25.3.1 Flash memory CRC operation function (highspeed CRC) (c) p.1138 Deletion of description and Addition of Caution in 25.3.2 CRC operation function (general-purpose CRC) (c) p.1140 Change of Caution in Figure 25-7. Format of RAM Parity Error Control Register (RPECTL) (c) p.1143, 1144 Addition of Note in Figure 25-11. Invalid access detection area (c) p.1146 Change of Remark in Figure 25-12. Format of Invalid Memory Access Detection Control Register (IAWCTL) (c) p.1148 Change of description in Timer input select else register (TISELSE) (c) p.1149 Addition of description in 25.3.8 A/D test function (c) CHAPTER 26 REGULATOR p.1151 Addition of figure and Caution in 26.1 Regulator Overview (c) CHAPTER 27 OPTION BYTE This chapter Renamed VLVI, VLVIH, VLVIL to VLVD, VLVDH, VLVDL (LVD detection voltage) (b) p.1154 Change of description in Figure 27-1. Format of User Option Byte (000C0H/020C0H) (c) p.1155, 1156 Change of description and Addition of Remark in Figure 27-2. Format of User Option Byte (000C1H/020C1H) CHAPTER 28 FLASH MEMORY (c) p.1162 Addition of information for 48 pins’ products in Table 28-1 Wiring Between RL78/D1A and Dedicated Flash Memory Programmer (a) p.1163 Deletion of description in 28.1.1 Programming Environment (c) p.1164 Addition of description in 28.2 Writing to Flash Memory by Using External Device (that Incorporates UART) (e) p.1166 Addition of Remark in 28.3 Connection of Pins on Board (c) p.1169 Change and addition and deletion of description in 28.4.1 Data flash overview (c) p.1172 Deletion of description in 28.5.2 Flash memory programming mode (c) p.1172 Change of figure and Remark in Figure 28-8. Setting of Flash Memory Programming Mode (c) p.1173 Deletion of description and addition of description in Table 28-5. Programming Modes and Voltages at Which Data Can Be Written, Erased, or Verified (b)(c) p.1173 Change of description in Table 28-6. Communication Modes (c) p.1175 Addition of description in 28.5.5 Description of signature data (b) p.1176 Change of description in 28.6 Security Settings (c) p.1176 Addition of Caution in 28.6 Security Settings (c) p.1178 Change of Caution in 28.7 Flash Memory Programming by Self-Programming (c) p.1178 Deletion of description in Table 28-11 Programming Modes and Voltages at Which Data Can Be Written, Erased, or Verified (b) p.1178 Addition of description in 28.7 Flash Memory Programming by Self-Programming (b) CHAPTER 31 INSTRUCTION SET p.1203 Change of description in Table 31-5. Operation List (a) CHAPTER 32 ELECTRICAL SPECIFICATIONS (J GRADE PRODUCT) (TARGET) This chapter All specification is updated. (a)(b) CHAPTER 33 ELECTRICAL SPECIFICATIONS (J GRADE PRODUCT) (TARGET) This chapter All specification is updated. (a)(b) CHAPTER 34 PACKAGE DRAWINGS This chapter Addition of chapter for package drawings (b) Remark “Classification” in the above table classifies revisions as follows. (a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note, (d): Addition/change of package, part number, or management division, (e): Addition/change of related documents R01UH0317EJ0004 Rev. 0.04 1333 Feb. 22, 2013
RL78/D1A User’s Manual: Hardware Publication Date: Rev.0.04 Feb 22, 2013 Published by: Renesas Electronics Corporation
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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6.8 Operation of Plural Channels of
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34.2 64-pin products 1276 R5F10CLDx
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