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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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<br />

Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 12 SERIAL ARRAY UNIT<br />

(4) Serial communication operation setting register mn (SCRmn)<br />

SCRmn is a communication operation setting register of channel n. It is used to set a data transmission/reception<br />

mode, phase of data and clock, whether an error signal is to be masked or not, parity bit, start bit, stop bit, and data<br />

length.<br />

Rewriting SCRmn is prohibited when the register is in operation (when SEmn = 1).<br />

SCRmn can be set by a 16-bit memory manipulation instruction.<br />

Reset signal generation sets this register to 0087H.<br />

Figure 12-9. Format of Serial Communication Operation Setting Register mn (SCRmn) (1/2)<br />

Address: F010CH, F010DH (SCR00), F010EH, F010FH (SCR01), After reset: 0087H R/W<br />

F013CH, F013DH (SCR10), F013EH, F013FH (SCR11)<br />

Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

SCRmn TXE<br />

mn<br />

TXE<br />

mn<br />

RXE<br />

mn<br />

RXE<br />

mn<br />

DAP<br />

mn<br />

CKP<br />

mn<br />

0 0 Does not start communication.<br />

0 1 Reception only<br />

1 0 Transmission only<br />

1 1 Transmission/reception<br />

DAP<br />

mn<br />

CKP<br />

mn<br />

0 0<br />

0 1<br />

1 0<br />

1 1<br />

0 0 0 0 DIR<br />

mn<br />

0 SLC<br />

mn1<br />

R01UH0317EJ0004 Rev. 0.04 571<br />

Feb. 22, 2013<br />

SLC<br />

mn0<br />

Setting of operation mode of channel n<br />

DLS<br />

mn3<br />

DLS<br />

mn2<br />

DLS<br />

mn1<br />

Selection of data and clock phase in CSI mode Type<br />

SCKp<br />

SOp<br />

SIp input timing<br />

SCKp<br />

SOp<br />

SIp input timing<br />

SCKp<br />

SOp<br />

SIp input timing<br />

SCKp<br />

SOp<br />

SIp input timing<br />

D7 D6 D5 D4 D3 D2 D1 D0<br />

D7 D6 D5 D4 D3 D2 D1 D0<br />

D7 D6 D5 D4 D3 D2 D1 D0<br />

D7 D6 D5 D4 D3 D2 D1 D0<br />

Be sure to set DAPmn, CKPmn = 0, 0 in the simplified I 2 C mode.<br />

Caution Be sure to clear bits 6, 8 to 11 of SCRmn to “0”.<br />

Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), p: CSI number (p = 00, 01, 10, 11)<br />

1<br />

2<br />

3<br />

4<br />

DLS<br />

mn0

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