RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 11 A/D CONVERTER Figure 11-1. Block Diagram of A/D Converter Remark Analog input pin for figure 11-1 when a 100-pin product is used. R01UH0317EJ0004 Rev. 0.04 505 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 11 A/D CONVERTER 11.2 Configuration of A/D Converter The A/D converter includes the following hardware. (1) ANI0 to ANI8 pins These are the analog input pins of the nine channels of the A/D converter. They input analog signals to be converted into digital signals. Pins other than the one selected as the analog input pin can be used as I/O port pins. (2) Sample & hold circuit The sample & hold circuit samples each of the analog input voltages sequentially sent from the input circuit, and sends them to the A/D voltage comparator. This circuit also holds the sampled analog input voltage during A/D conversion. (3) A/D voltage comparator This A/D voltage comparator compares the voltage generated from the voltage tap of the comparison voltage generator with the analog input voltage. This A/D voltage comparator compares the voltage generated from the voltage tap of the comparison voltage generator with the analog input voltage. If the analog input voltage is found to be greater than the reference voltage (1/2 AVREF) as a result of the comparison, the most significant bit (MSB) of the successive approximation register (SAR) is set. If the analog input voltage is less than the reference voltage (1/2 AVREF), the MSB bit of the SAR is reset. After that, bit 8 of the SAR register is automatically set, and the next comparison is made. The voltage tap of the comparison voltage generator is selected by the value of bit 9, to which the result has been already set. Bit 9 = 0: (1/4 AVREF) Bit 9 = 1: (3/4 AVREF) The voltage tap of the comparison voltage generator and the analog input voltage are compared and bit 8 of the SAR register is manipulated according to the result of the comparison. Analog input voltage Voltage tap of comparison voltage generator: Bit 8 = 1 Analog input voltage Voltage tap of comparison voltage generator: Bit 8 = 0 Comparison is continued like this to bit 0 of the SAR register. When performing A/D conversion at a resolution of 8 bits, the comparison continues until bit 2 of the SAR register. Remark AVREF: The + side reference voltage of the A/D converter. This can be selected from AVREFP, the internal reference voltage (1.45 V), and VDD. (4) Comparison voltage generator The comparison voltage generator generates the comparison voltage input from an analog input pin. R01UH0317EJ0004 Rev. 0.04 506 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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19.2 Configuration of DMA Controlle
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34.2 64-pin products 1276 R5F10CLDx
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34.4 100-pin products 1278 CHAPTER
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RL78/D1A User’s Manual: Hardware
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