RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)
13.7 LIN Communication Automatic Baud Rate Mode
In LIN communication automatic baud rate mode, a BF and an SF are automatically detected and the baud rate is set
according to the measurement result of the SF.
When UFnMD1 and UFnMD0 are set to “11B”, operation is performed in automatic baud rate mode.
Operation can be performed with the baud rate at 2,400 bps to 128 kbps. Set to 8 to 12 MHz the clock (prescaler
clock) that has been divided by using a prescaler. At that time, the setting values of UFnPRS2 to UFnPRS0 must be
calculated from the fCLK frequency and initial settings must be performed.
When using LIN-UART as the master, using automatic baud rate mode (UFnMD1, UFnMD0 = 11B) is prohibited.
Figure 13-52. Basic Processing Flow Example of LIN Communication Automatic Baud Rate Mode (1/2)
Initial settings
Prescaler setting
(UFnCTL1 register)
Transmit data level
(UFnOPT0 register)
Various mode settings
(UFnOPT1)
Noise filter,
INTLTn timing settings
(UFnOPT2)
Various mode settings,
enabling transmission/reception
(UFnCTL0)
END
INTLSn processing
Read UFnSTR register
Clear status flag
(UFnSTC register)
Processing corresponding
to status
Cautions 1. Set the following values when performing LIN communication automatic baud rate mode.
The transmit and receive data levels are normal input (UFnTDL = UFnRDL = 0).
Expansion bits are disabled (UFnEBE = 0).
Automatic baud rate mode (UFnMD1, UFnMD0 = 11B) as the mode.
Consistency check selection (UFnDCS = 1).
Transmission interrupt is transmission start (UFnITS = 0).
Communication direction control is LSB first (UFnDIR = 1).
The parity selection bit is received without parity (UFnPS1, UFnPS0 = 00B).
The data character length is 8 bits (UFnCL = 1).
Transmit data register is default value (UFnTX = 0000H).
2. Set the UFnPRS2 to UFnPRS0 bits so that the clock that has been divided by using a prescaler is
8 to 12 MHz.
R01UH0317EJ0004 Rev. 0.04 752
Feb. 22, 2013
END
Remarks 1. See (2) of 13.11 Cautions on Use for details of starting LIN-UART.
2. n = 0, 1