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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)<br />

13.7.2 Response preparation error detection function<br />

If response preparation (setting of the UFnNO, UFnRRQ, and UFnTRQ bits) is not performed before reception of the<br />

first byte by a response is completed (sampling point of the stop bit (first bit)) when in automatic baud rate mode (UFnMD1,<br />

UFnMD0 = 11B), a response preparation error flag (UFnRPE) is set, a status interrupt request signal (INTLSn) is<br />

generated, and subsequent transmission and reception processing are stopped (responses are ignored) without data<br />

being stored.<br />

When only this product has performed response transmission, no response preparation error occurs, because<br />

reception is not performed at the LRxDn pin. When response transmission is started (UFnTRQ = 1) after reception at the<br />

LRxDn pin has been started, recognition can be performed by the occurrence of consistency errors.<br />

LRxDn pin<br />

INTLRn<br />

UFnHDC flag<br />

LRxDn pin<br />

Sampling point<br />

UFnNO bit “L”<br />

UFnRRQ bit<br />

UFnTRQ bit<br />

INTLSn<br />

UFnRPE flag<br />

“L”<br />

“L”<br />

Figure 13-61. Response Preparation Error Occurrence Example<br />

BF SF PID data data CSF<br />

Clear<br />

Sets UFnCLHDC bit to 1<br />

BF wait successful<br />

Start Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Stop<br />

Transmission/<br />

reception stopped<br />

Caution If UFnCON = 0, no response preparation error will occur, because a BF reception wait state is entered after<br />

communication of the number of bytes set using the UFnBUL3 to UFnBUL0 bits is completed.<br />

If UFnCON = 1, a response preparation error check state is entered again after communication of the<br />

number of bytes set using the UFnBUL3 to UFnBUL0 bits is completed.<br />

A response preparation error will occur if a receive operation is started before setting UFnTRQ the next time<br />

after response transmission is completed.<br />

Remark n = 0, 1<br />

R01UH0317EJ0004 Rev. 0.04 761<br />

Feb. 22, 2013<br />

All “L”

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