RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 12 SERIAL ARRAY UNIT
12.2 Configuration of Serial Array Unit
Serial array unit includes the following hardware.
Table 12-1. Configuration of Serial Array Unit
Item Configuration
Shift register 16 bits
Buffer register Serial data register mn (SDRmn) Note
Serial clock I/O SCK00, SCK01, SCK10 pins (for 3-wire serial I/O), SCL11 pins (for simplified I 2 C)
Serial data input SI00, SI01, SI10 pins (for 3-wire serial I/O)
Serial data output SO00, SO01, SO10, pins (for 3-wire serial I/O)
Serial data I/O SDA11 pins (for simplified I 2 C)
Control registers
Peripheral enable register 0 (PER0)
Serial clock select register m (SPSm)
Serial channel enable status register m (SEm)
Serial channel start register m (SSm)
Serial channel stop register m (STm)
Serial output enable register m (SOEm)
Serial output register m (SOm)
Serial output level register m (SOLm)
Note During operation (SEmn = 1)
Serial data register mn (SDRmn)
Serial mode register mn (SMRmn)
Serial communication operation setting register mn (SCRmn)
Serial status register mn (SSRmn)
Serial flag clear trigger register mn (SIRmn)
Serial communication pin select register (STSEL)
Port input mode registers 0, 1, 3, 5 to 7, 13 (PIM0, PIM1, PIM3, PIM5 to PIM7, PIM13)
Port output mode register (POM)
Port mode registers 0, 1, 3, 5 to 7 (PM0, PM1, PM3, PM5 to PM7)
Port registers 0, 1, 3, 5 to 7 (P0, P1, P3, P5 to P7)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1),
p: CSI number (p = 00, 01, 10), r: IIC number (r = 11)
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Feb. 22, 2013