RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER Figure 14-75 shows the processing not to skip resumption of transmitting a message that was stopped when transmission of an ABT message buffer was aborted. Figure 14-75. ABT Transmission Abort Processing (Normal Operation Mode with ABT) START TSTAT = 0? Clear ABTTRG bit ABTTRG = 0? Yes Clear TRQ bit of message buffer whose transmission was aborted Transmit abort Transmission start END Yes Yes Set ABTCLR bit Cautions 1. Do not set any transmission requests while ABT transmission abort processing is in progress. 2. Make a CAN sleep mode/CAN stop mode transition request after ABTTRG bit is cleared (after ABT mode is aborted) following the procedure shown in Figure 14-75 or 14-76. When clearing a transmission request in an area other than the ABT area, follow the procedure shown in Figure 14-74. R01UH0317EJ0004 Rev. 0.04 931 Feb. 22, 2013 No No No
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER Figure 14-76 shows the processing to skip resumption of transmitting a message that was stopped when transmission of an ABT message buffer was aborted. Figure 14-76. ABT Transmission Request Abort Processing (Normal Operation Mode with ABT) START Clear TRQ bit of message buffer undergoing transmission Clear ABTTRG bit ABTTRG = 0? Transmit abort Transmission start pointer clear? END Yes Yes Set ABTCLR bit Cautions 1. Do not set any transmission requests while ABT transmission abort processing is in progress. 2. Make a CAN sleep mode/CAN stop mode request after ABTTRG is cleared (after ABT mode is stopped) following the procedure shown in Figure 14-75 or 14-76. When clearing a transmission request in an area other than the ABT area, follow the procedure shown in Figure 14-74. R01UH0317EJ0004 Rev. 0.04 932 Feb. 22, 2013 No No
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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14.9.1 Message reception ..........
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19.2 Configuration of DMA Controlle
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34.2 64-pin products 1276 R5F10CLDx
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