RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 18 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR (2) Multiplication/division data register B (MDBL, MDBH) The MDBH and MDBL registers set the values that are used for multiplication or division operation and store the operation result. They store the operation result (product) in the multiplication mode and multiply-accumulator mode, and set the divisor data in the division mode. The MDBH and MDBL registers can be set by a 16-bit manipulation instruction. Reset signal generation clears these registers to 0000H. Figure 18-3. Format of Multiplication/Division Data Register B (MDBH, MDBL) Address: FFFF4H, FFFF5H, FFFF6H, FFFF7H After reset: 0000H, 0000H R/W Symbol FFFF5H FFFF4H MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH MDBH 15 14 13 12 11 10 Symbol FFFF7H FFFF6H 9 MDBL MDBL MDBL MDBL MDBL MDBL MDBL MDBL MDBL MDBL MDBL MDBL MDBLMDBHLMDBL MDBL MDBL 15 14 13 12 11 10 9 R01UH0317EJ0004 Rev. 0.04 1013 Feb. 22, 2013 8 8 Cautions 1. Do not rewrite the MDBH and MDBL registers values during division operation processing (when the multiplication/division control register (MDUC) value is 81H or C1H) or multiplyaccumulation operation processing. The operation result will be an undefined value. 2. Do not set the MDBH and MDBL registers to 0000H in the division mode. If they are set, the operation result will be an undefined value. 3. The data is in the two's complement format in either the multiplication mode (signed) or multiply-accumulator mode (signed). The following table shows the functions of the MDBH and MDBL registers during operation execution. Table 18-3. Functions of MDBH and MDBL Registers During Operation Execution Operation Mode Setting Operation Result Multiplication mode (unsigned) Multiply-accumulator mode (unsigned) Multiplication mode (signed) Multiply-accumulator mode (signed) Division mode (unsigned) MDBH: Divisor (unsigned) Higher 16 bits MDBL: Divisor (unsigned) Lower 16 bits 7 7 6 6 5 5 4 4 3 3 MDBH: Multiplication result (product) (unsigned) Higher 16 bits MDBL: Multiplication result (product) (unsigned) Lower 16 bits MDBH: Multiplication result (product) (signed) Higher 16 bits MDBL: Multiplication result (product) (signed) Lower 16 bits 2 2 1 1 0 0
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 18 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR (3) Multiplication/division data register C (MDCL, MDCH) The MDCH and MDCL registers are used to store the accumulated result while in the multiply-accumulator mode or the remainder of the operation result while in the division mode. These registers are not used while in the multiplication mode. The MDCH and MDCL registers can be set by a 16-bit manipulation instruction. Reset signal generation clears these registers to 0000H. Figure 18-4. Format of Multiplication/Division Data Register C (MDCH, MDCL) Address: F00E0H, F00E1H, F00E2H, F00E3H After reset: 0000H, 0000H R/W Symbol F00E3H F00E2H MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH MDCH Symbol 15 14 13 12 11 10 9 R01UH0317EJ0004 Rev. 0.04 1014 Feb. 22, 2013 8 F00E1H F00E0H MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL MDCL 15 14 13 12 11 10 9 8 Cautions 1. The MDCH and MDCL registers values read during division operation processing (when the 7 7 multiplication/division control register (MDUC) value is 81H or C1H) will not be guaranteed. 2. During multiply-accumulator processing, do not use software to rewrite the values of the MDCH and MDCL registers. If this is done, the operation result will be undefined. 3. The data is in the two's complement format in the multiply-accumulator mode (signed). Table 18-4. Functions of MDCH and MDCL Registers During Operation Execution Operation Mode Setting Operation Result Multiplication mode (unsigned or signed) 6 6 Multiply-accumulator mode MDCH: Initial accumulated value (unsigned) MDCH: accumulated value (unsigned) (unsigned) higher 16 bits higher 16 bits MDCL: Initial accumulated value (unsigned) MDCL: accumulated value (unsigned) lower 16 bits lower 16 bits Multiply-accumulator mode MDCH: Initial accumulated value (signed) MDCH: accumulated value (signed) (signed) higher 16 bits higher 16 bits MDCL: Initial accumulated value (signed) MDCL: accumulated value (signed) lower 16 bits lower 16 bits Division mode (unsigned) MDCH: Remainder (unsigned) higher 16 bits MDCL: Remainder (unsigned) lower 16 bits 5 5 4 4 3 3 2 2 1 1 0 0
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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